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From:   "Wu, Hao" <hao.wu@intel.com>
To:     "Zhang, Tianfei" <tianfei.zhang@intel.com>,
        "trix@redhat.com" <trix@redhat.com>,
        "mdf@kernel.org" <mdf@kernel.org>,
        "Xu, Yilun" <yilun.xu@intel.com>,
        "linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
        "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "corbet@lwn.net" <corbet@lwn.net>,
        Matthew Gerlach <matthew.gerlach@linux.intel.com>
Subject: RE: [PATCH v3 4/5] fpga: dfl: Handle dfl's starting with AFU
Thread-Topic: [PATCH v3 4/5] fpga: dfl: Handle dfl's starting with AFU
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Date:   Tue, 1 Mar 2022 07:27:36 +0000
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References: <20220301062123.818687-1-tianfei.zhang@intel.com>
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> -----Original Message-----
> From: Zhang, Tianfei <tianfei.zhang@intel.com>
> Sent: Tuesday, March 1, 2022 2:21 PM
> To: Wu, Hao <hao.wu@intel.com>; trix@redhat.com; mdf@kernel.org; Xu, Yilu=
n
> <yilun.xu@intel.com>; linux-fpga@vger.kernel.org; linux-doc@vger.kernel.o=
rg
> Cc: linux-kernel@vger.kernel.org; corbet@lwn.net; Matthew Gerlach
> <matthew.gerlach@linux.intel.com>; Zhang, Tianfei <tianfei.zhang@intel.co=
m>
> Subject: [PATCH v3 4/5] fpga: dfl: Handle dfl's starting with AFU
>=20
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>=20
> Allow for a Device Feature List (DFL) to start with
> a Device Feature Header (DFH) of type Accelerator Function Unit (AFU)
> by doing nothing. This allows for PCIe VFs to be created.

Why this is related to VFs creation? We don't have AFU in PF in OFS case, r=
ight?

>=20
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
> ---
>  drivers/fpga/dfl-pci.c |  7 ++++++-
>  drivers/fpga/dfl.c     | 22 +++++++++++++---------
>  2 files changed, 19 insertions(+), 10 deletions(-)
>=20
> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> index 33545c999c06..e7d58e7b1bbd 100644
> --- a/drivers/fpga/dfl-pci.c
> +++ b/drivers/fpga/dfl-pci.c
> @@ -275,7 +275,12 @@ static int find_dfls_by_default(struct pci_dev *pcid=
ev,
>=20
>  		dfl_fpga_enum_info_add_dfl(info, start, len);
>  	} else {

Can be something like else if dfl_feature_is_afu(base) following the same s=
tyle.

> -		ret =3D -ENODEV;
> +		v =3D readq(base + DFH);
> +		if (FIELD_GET(DFH_TYPE, v) !=3D DFH_TYPE_AFU) {
> +			dev_info(&pcidev->dev, "Unknown feature type 0x%llx
> id 0x%llx\n",
> +				 FIELD_GET(DFH_TYPE, v), FIELD_GET(DFH_ID,
> v));
> +			ret =3D -ENODEV;
> +		}

But nothing else done for AFU so far? How it works? Sounds like more patche=
s
are required.

>  	}
>=20
>  	/* release I/O mappings for next step enumeration */
> diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> index fd04ef5c8b03..e30bbb3039cd 100644
> --- a/drivers/fpga/dfl.c
> +++ b/drivers/fpga/dfl.c
> @@ -900,9 +900,11 @@ static void build_info_free(struct
> build_feature_devs_info *binfo)
>  		dfl_id_free(feature_dev_id_type(binfo->feature_dev),
>  			    binfo->feature_dev->id);
>=20
> -		list_for_each_entry_safe(finfo, p, &binfo->sub_features, node)
> {
> -			list_del(&finfo->node);
> -			kfree(finfo);
> +		if (!list_empty(&binfo->sub_features)) {
> +			list_for_each_entry_safe(finfo, p, &binfo-
> >sub_features, node) {
> +				list_del(&finfo->node);
> +				kfree(finfo);
> +			}
>  		}
>  	}
>=20
> @@ -1439,12 +1441,14 @@ dfl_fpga_feature_devs_enumerate(struct
> dfl_fpga_enum_info *info)
>  	 * start enumeration for all feature devices based on Device Feature
>  	 * Lists.
>  	 */
> -	list_for_each_entry(dfl, &info->dfls, node) {
> -		ret =3D parse_feature_list(binfo, dfl->start, dfl->len);
> -		if (ret) {
> -			remove_feature_devs(cdev);
> -			build_info_free(binfo);
> -			goto unregister_region_exit;
> +	if (!list_empty(&info->dfls)) {
> +		list_for_each_entry(dfl, &info->dfls, node) {
> +			ret =3D parse_feature_list(binfo, dfl->start, dfl->len);
> +			if (ret) {
> +				remove_feature_devs(cdev);
> +				build_info_free(binfo);
> +				goto unregister_region_exit;
> +			}
>  		}
>  	}
>=20
> --
> 2.26.2