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[2620:137:e000::1:20]) by mx.google.com with ESMTP id p13-20020a17090653cd00b006a6121a086fsi8881396ejo.563.2022.03.01.12.33.47; Tue, 01 Mar 2022 12:34:11 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=jyJl5hVi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235670AbiCARPf (ORCPT + 99 others); Tue, 1 Mar 2022 12:15:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234538AbiCARPe (ORCPT ); Tue, 1 Mar 2022 12:15:34 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6DF21ADAB; Tue, 1 Mar 2022 09:14:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1646154892; x=1677690892; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=xfA3Q2rNoGikcOpleBBhk8TcVgjijI+nX7d6AMT5f50=; b=jyJl5hVibsqZxkkVWbDzPzDH/dOfeRAo5euiKg1bdYMWcZc7dcBfl+Pl N0srpjWCPTvPITzojJFPoxOpQDrA2gf4Ajx/7GJ2xRyHs1rQqozoQO8qQ +NM2pqcJRkD313U5j1lwXpCWgZkAc66EZJsUiS+Dch46zWcYgvGvwfDWO E7Oe89XY3K6K1OdLGFDlSUJ34ARVbg9DDMtuyDBpinIbWGbiB8gNOsbOy q1QziYvLQ8EhLl0IGthh7UCiAPfNZSY48TRelkAxzDXLfVYfoiO6harc5 MvqCM6BFakXYN8OvkvCWW3MtN+RjIBrdKO+OMTbY7VRXNGKhta7E1JZmv w==; X-IronPort-AV: E=McAfee;i="6200,9189,10273"; a="253113949" X-IronPort-AV: E=Sophos;i="5.90,146,1643702400"; d="scan'208";a="253113949" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Mar 2022 09:14:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,146,1643702400"; d="scan'208";a="550809589" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.151]) by orsmga008.jf.intel.com with SMTP; 01 Mar 2022 09:14:46 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 01 Mar 2022 19:14:46 +0200 Date: Tue, 1 Mar 2022 19:14:46 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Colin Ian King Cc: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH][V2] drm/i915: make a handful of read-only arrays static const Message-ID: References: <20220223120923.239867-1-colin.i.king@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220223120923.239867-1-colin.i.king@gmail.com> X-Patchwork-Hint: comment X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 23, 2022 at 12:09:23PM +0000, Colin Ian King wrote: > Don't populate the read-only arrays on the stack but instead make > them static const and signed 8 bit ints. Also makes the object code a > little smaller. Reformat the statements to clear up checkpatch warning. > > Signed-off-by: Colin Ian King Thanks. Pushed to drm-intel-next. > --- > > V2: Make arrays signed 8 bit integers as requested by Ville Syrj?l? > > --- > drivers/gpu/drm/i915/display/intel_vdsc.c | 16 ++++++++++++---- > 1 file changed, 12 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c > index 3faea903b9ae..d49f66237ec3 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -378,10 +378,18 @@ calculate_rc_params(struct rc_parameters *rc, > { > int bpc = vdsc_cfg->bits_per_component; > int bpp = vdsc_cfg->bits_per_pixel >> 4; > - int ofs_und6[] = { 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12 }; > - int ofs_und8[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 }; > - int ofs_und12[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 }; > - int ofs_und15[] = { 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12 }; > + static const s8 ofs_und6[] = { > + 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12 > + }; > + static const s8 ofs_und8[] = { > + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 > + }; > + static const s8 ofs_und12[] = { > + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 > + }; > + static const s8 ofs_und15[] = { > + 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12 > + }; > int qp_bpc_modifier = (bpc - 8) * 2; > u32 res, buf_i, bpp_i; > > -- > 2.34.1 -- Ville Syrj?l? Intel