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References: <20220216085842.1973868-1-victor.liu@nxp.com> <Yh9WYZ5pA/MUyZFx@qwark.sigxcpu.org>
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From:   Robert Foss <robert.foss@linaro.org>
Date:   Wed, 2 Mar 2022 14:12:51 +0100
Message-ID: <CAG3jFyu8mzG07MUg_-0O4Ew=CM6xDX=9e47e2t7dc88K9seycQ@mail.gmail.com>
Subject: Re: [PATCH] drm/bridge: nwl-dsi: Remove superfluous write to
 NWL_DSI_IRQ_MASK register
To:     =?UTF-8?Q?Guido_G=C3=BCnther?= <agx@sigxcpu.org>
Cc:     Liu Ying <victor.liu@nxp.com>, dri-devel@lists.freedesktop.org,
        linux-kernel@vger.kernel.org, linux-imx@nxp.com
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On Wed, 2 Mar 2022 at 12:35, Guido G=C3=BCnther <agx@sigxcpu.org> wrote:
>
> Hi Liu,
> On Wed, Feb 16, 2022 at 04:58:42PM +0800, Liu Ying wrote:
> > To initialize register NWL_DSI_IRQ_MASK, it's enough to write it
> > only once in function nwl_dsi_init_interrupts().
> >
> > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > ---
> >  drivers/gpu/drm/bridge/nwl-dsi.c | 14 +++++---------
> >  1 file changed, 5 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/=
nwl-dsi.c
> > index af07eeb47ca0..fcc4a2889ad4 100644
> > --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> > +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> > @@ -333,17 +333,13 @@ static int nwl_dsi_config_dpi(struct nwl_dsi *dsi=
)
> >
> >  static int nwl_dsi_init_interrupts(struct nwl_dsi *dsi)
> >  {
> > -     u32 irq_enable;
> > -
> > -     nwl_dsi_write(dsi, NWL_DSI_IRQ_MASK, 0xffffffff);
> > -     nwl_dsi_write(dsi, NWL_DSI_IRQ_MASK2, 0x7);
> > -
> > -     irq_enable =3D ~(u32)(NWL_DSI_TX_PKT_DONE_MASK |
> > -                         NWL_DSI_RX_PKT_HDR_RCVD_MASK |
> > -                         NWL_DSI_TX_FIFO_OVFLW_MASK |
> > -                         NWL_DSI_HS_TX_TIMEOUT_MASK);
> > +     u32 irq_enable =3D ~(u32)(NWL_DSI_TX_PKT_DONE_MASK |
> > +                             NWL_DSI_RX_PKT_HDR_RCVD_MASK |
> > +                             NWL_DSI_TX_FIFO_OVFLW_MASK |
> > +                             NWL_DSI_HS_TX_TIMEOUT_MASK);
> >
> >       nwl_dsi_write(dsi, NWL_DSI_IRQ_MASK, irq_enable);
> > +     nwl_dsi_write(dsi, NWL_DSI_IRQ_MASK2, 0x7);
>
> Works fine here. I thought it was due to some hw quirk but can't find
> any note in it so:
>
> Reviewed-by: Guido G=C3=BCnther <agx@sigxcpu.org>
>
> Thanks,
>  -- Guido

Applied to drm-misc-next