Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
IronPort-SDR: TGx5UzD12XkA+2UZwwYQPqSgsHoaEDCQN1/VCfBxBoL7YOOalAiVxMirsmEkq3VUXJOSCsBV2o
 uhF/1VJ3OuMKNJd0Zz5AZTTrqo59ZOutt3uVDm7rydmybOyb/1BGhooMxTFdRlyjjr1rnWRIE8
 D14XL2kH2M/B8w4iw6T0UIy9GqynZdyFiF0eI95HWiVfRxhSXHRxscaAi+M1qTnFQR9y4Bgr0w
 AzIT9YtD5byL79xmelm5cJVAZ4gvvlvCLgB6wlbTj3R4ikKgpWLe8aHOV4xqSxw+qHp5R1H7wh
 0qQyoP5HoHjUbnQb2dp0c2jx
IronPort-SDR: 0Nz4aZRzth8c8ltzZZMQP7uGeyS4AcadeYGBPQueKh4AHyzUTSSWANDtSdvGYaTi3WWlhX43q4
 qdN+4Etaq63VORTwD4FW4j8RWHLM+TYrs54k0RMaSlfcfyCfZbyA8ma80se/+t6QgTaEcuEDu/
 qpNbaF1CrzLcm3feRMJtyEjGV9trXpvZnQ4bjjKMP4WkpPz6EdlmgOJKS6yuXEZNAhfgl3rv9R
 wd1ZZPs2mqEf/huP4cVX+yZHGQzymWjRNAPgdf+lnp9CMAzuALVxHKRlJtNCf4ctyM4nm4boID
 Rqs=
WDCIronportException: Internal
Message-ID: <0a7c8ee9-1e09-75a4-3241-883fc8540561@opensource.wdc.com>
Date:   Thu, 3 Mar 2022 14:23:01 +0200
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0)
 Gecko/20100101 Thunderbird/91.6.1
Subject: Re: [PATCH 2/2] [RFC] ata: ahci: Skip debounce delay for AMD FCH SATA
 Controller
Content-Language: en-US
To:     Paul Menzel <pmenzel@molgen.mpg.de>
Cc:     Hans de Goede <hdegoede@redhat.com>,
        Mario Limonciello <mario.limonciello@amd.com>,
        linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20220303100453.30018-1-pmenzel@molgen.mpg.de>
 <20220303100453.30018-2-pmenzel@molgen.mpg.de>
From:   Damien Le Moal <damien.lemoal@opensource.wdc.com>
Organization: Western Digital Research
In-Reply-To: <20220303100453.30018-2-pmenzel@molgen.mpg.de>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On 2022/03/03 12:04, Paul Menzel wrote:
> AMD devices with the FCH SATA Controller 0x1022:0x7901 do not need the
> default debounce delay of 200 ms.
>=20
>     07:00.2 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] =
FCH SATA Controller [AHCI mode] [1022:7901] (rev 51)
>=20
> So skip it, by mapping it to the board with no debounce delay.
>=20
> Tested on the MSI MS-7A37/B350M MORTAR (MS-7A37).
>=20
> To-do: Add test details and results.

Please squash this patch together with patch 1. Since you are adding a ne=
w board
entry definition, it is better to have a user for it in the same patch (t=
his
avoids reverts to leave unused code behind).

>=20
> Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
> Cc: Hans de Goede <hdegoede@redhat.com>
> Cc: Mario Limonciello <mario.limonciello@amd.com>
> ---
> I am travelling so could not test this exact patch just yet, but I ran
> something similar for several weeks already. It=E2=80=99d be great, if =
the
> desktop and AMD folks could also give this a try.
>=20
>  drivers/ata/ahci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
> index 0fc09b86a559..44b79fe43d13 100644
> --- a/drivers/ata/ahci.c
> +++ b/drivers/ata/ahci.c
> @@ -456,7 +456,7 @@ static const struct pci_device_id ahci_pci_tbl[] =3D=
 {
>  	{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
>  	{ PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hu=
dson-2 (AHCI mode) */
>  	{ PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
> -	{ PCI_VDEVICE(AMD, 0x7901), board_ahci_low_power }, /* AMD Green Sard=
ine */
> +	{ PCI_VDEVICE(AMD, 0x7901), board_ahci_low_power_no_debounce_delay },=
 /* AMD Green Sardine */

Really long name, but I cannot think of anything better...

>  	/* AMD is using RAID class only for ahci controllers */
>  	{ PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
>  	  PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },


--=20
Damien Le Moal
Western Digital Research