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From:   Muchun Song <songmuchun@bytedance.com>
Date:   Thu, 3 Mar 2022 19:20:30 +0800
Message-ID: <CAMZfGtXHX7qovi_-oRwbpoGKig_6rqdx4eK6Hva40qCZVRL26w@mail.gmail.com>
Subject: Re: [PATCH v2 RESEND 1/2] arm64: avoid flushing icache multiple times
 on contiguous HugeTLB
To:     Catalin Marinas <catalin.marinas@arm.com>
Cc:     Will Deacon <will@kernel.org>,
        Andrew Morton <akpm@linux-foundation.org>,
        David Hildenbrand <david@redhat.com>,
        "Bodeddula, Balasubramaniam" <bodeddub@amazon.com>,
        Oscar Salvador <osalvador@suse.de>,
        Mike Kravetz <mike.kravetz@oracle.com>,
        David Rientjes <rientjes@google.com>,
        Mark Rutland <mark.rutland@arm.com>, james.morse@arm.com,
        "Song Bao Hua (Barry Song)" <song.bao.hua@hisilicon.com>,
        linux-arm-kernel@lists.infradead.org,
        LKML <linux-kernel@vger.kernel.org>,
        Linux Memory Management List <linux-mm@kvack.org>,
        Xiongchun duan <duanxiongchun@bytedance.com>,
        Fam Zheng <fam.zheng@bytedance.com>,
        Muchun Song <smuchun@gmail.com>
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On Wed, Mar 2, 2022 at 8:32 PM Catalin Marinas <catalin.marinas@arm.com> wrote:
>
> On Wed, Mar 02, 2022 at 04:46:23PM +0800, Muchun Song wrote:
> > When a contiguous HugeTLB page is mapped, set_pte_at() will be called
> > CONT_PTES/CONT_PMDS times.  Therefore, __sync_icache_dcache() will
> > flush cache multiple times if the page is executable (to ensure
> > the I-D cache coherency).  However, the first flushing cache already
> > covers subsequent cache flush operations.  So only flusing cache
> > for the head page if it is a HugeTLB page to avoid redundant cache
> > flushing.  In the next patch, it is also depends on this change
> > since the tail vmemmap pages of HugeTLB is mapped with read-only
> > meanning only head page struct can be modified.
> >
> > Signed-off-by: Muchun Song <songmuchun@bytedance.com>
>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>

Thanks for your review.

>
> (for this patch only, I have yet to figure out whether Anshuman's and
> Mark's comments have been addressed in patch 2)
>

Their comments are memory hotplug related, actually, those issues
are not real issues as I explained in patch 2.  And If you have any
questions, feel free to ask, maybe I can help.

Thanks Catalin.