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Thu, 3 Mar 2022 13:22:58 -0800 Received: from [10.110.60.142] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Thu, 3 Mar 2022 13:22:57 -0800 Message-ID: Date: Thu, 3 Mar 2022 13:22:56 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH 1/4] drm/msm: Update generated headers Content-Language: en-US To: Rob Clark , Dmitry Baryshkov CC: dri-devel , freedreno , linux-arm-msm , Jordan Crouse , Akhil P Oommen , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Stephen Boyd , open list References: <20220303194758.710358-1-robdclark@gmail.com> <20220303194758.710358-2-robdclark@gmail.com> <1a42ff3e-154a-b2b8-9c99-8d5fba9a38e5@quicinc.com> From: Abhinav Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_MED, SCC_BODY_URI_ONLY,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/3/2022 1:11 PM, Rob Clark wrote: > On Thu, Mar 3, 2022 at 12:42 PM Abhinav Kumar wrote: >> >> Hi Rob >> >> On 3/3/2022 11:46 AM, Rob Clark wrote: >>> From: Rob Clark >>> >>> Update headers from mesa commit: >>> >>> commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef >>> Author: Rob Clark >>> AuthorDate: Wed Mar 2 17:11:10 2022 -0800 >>> >>> freedreno/registers: Add a couple regs we need for kernel >>> >>> Signed-off-by: Rob Clark >>> Part-of: >>> >>> Signed-off-by: Rob Clark >>> --- >>> drivers/gpu/drm/msm/adreno/a2xx.xml.h | 26 +- >>> drivers/gpu/drm/msm/adreno/a3xx.xml.h | 30 +- >>> drivers/gpu/drm/msm/adreno/a4xx.xml.h | 112 ++- >>> drivers/gpu/drm/msm/adreno/a5xx.xml.h | 63 +- >>> drivers/gpu/drm/msm/adreno/a6xx.xml.h | 674 +++++++++++------- >>> drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 26 +- >>> .../gpu/drm/msm/adreno/adreno_common.xml.h | 31 +- >>> drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h | 46 +- >>> drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h | 37 +- >>> drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h | 37 +- >>> drivers/gpu/drm/msm/disp/mdp_common.xml.h | 37 +- >>> drivers/gpu/drm/msm/dsi/dsi.xml.h | 37 +- >>> drivers/gpu/drm/msm/dsi/dsi_phy_10nm.xml.h | 37 +- >>> drivers/gpu/drm/msm/dsi/dsi_phy_14nm.xml.h | 37 +- >>> drivers/gpu/drm/msm/dsi/dsi_phy_20nm.xml.h | 37 +- >>> drivers/gpu/drm/msm/dsi/dsi_phy_28nm.xml.h | 37 +- >>> .../gpu/drm/msm/dsi/dsi_phy_28nm_8960.xml.h | 37 +- >>> drivers/gpu/drm/msm/dsi/dsi_phy_5nm.xml.h | 480 ------------- >> Why is the 5nm PHY removed? Am i missing something? > > Dmitry removed it in mesa, because it was identical to 7nm > > BR, > -R Alright got it, for the display bits, Reviewed-by: Abhinav Kumar > >> >> Thanks >> >> Abhinav