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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 5-20020a630905000000b00374388c5454si5505676pgj.591.2022.03.04.09.55.29; Fri, 04 Mar 2022 09:55:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=ZIOhoEFL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239300AbiCDKDq (ORCPT + 99 others); Fri, 4 Mar 2022 05:03:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239268AbiCDKDj (ORCPT ); Fri, 4 Mar 2022 05:03:39 -0500 X-Greylist: delayed 162 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Fri, 04 Mar 2022 02:02:49 PST Received: from mx0b-001ae601.pphosted.com (mx0a-001ae601.pphosted.com [67.231.149.25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 085DA60DA; Fri, 4 Mar 2022 02:02:46 -0800 (PST) Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2247SM8v025160; Fri, 4 Mar 2022 04:02:04 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=date : from : to : cc : subject : message-id : references : mime-version : content-type : in-reply-to; s=PODMain02222019; bh=m480WoGIj49SZf0SqpjkJC1Q1fWJXgkdkw/YFV7gZvU=; b=ZIOhoEFL+j7MiKdJNswIPiJo2XRbj8ZXbLhmpxwEjkj273nmKamQM0sHXViVArG4jLfC HAr9QDidoAuC7jM+VTvXR0iHK3eCZs3rvpVx7s5VGnE8gJg6mPCjuBxDKNOVZgiO5bDY 2fzUxwydS+2LGORetBenjdFOWbqIoByA2d6iiL9f8R5dmpxAoZDSHbK4JmPquypSchTl TwH0n+NCl98SVj74mxnu3GLFqa6eFLB/crbYfeu1bXvm+4USpAG6Ra0QprxUjcPwpQd9 WGXt3wlAeaRTky8B1EHrNejuMb/RoFCobWJW0Ab1avEw8wplNwouMRimPIwUEPNQ+iaj Zw== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0a-001ae601.pphosted.com (PPS) with ESMTPS id 3ek4j1rs4q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Fri, 04 Mar 2022 04:02:04 -0600 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Fri, 4 Mar 2022 10:02:02 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.18 via Frontend Transport; Fri, 4 Mar 2022 10:02:02 +0000 Received: from ediswmail.ad.cirrus.com (ediswmail.ad.cirrus.com [198.61.86.93]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 047597C; Fri, 4 Mar 2022 10:02:01 +0000 (UTC) Date: Fri, 4 Mar 2022 10:02:01 +0000 From: Charles Keepax To: Lucas Tanure CC: Liam Girdwood , Mark Brown , Rob Herring , Jaroslav Kysela , Takashi Iwai , , , , Subject: Re: [PATCH 02/20] ASoC: cs35l41: Fix max number of TX channels Message-ID: <20220304100201.GX38351@ediswmail.ad.cirrus.com> References: <20220303173059.269657-1-tanureal@opensource.cirrus.com> <20220303173059.269657-3-tanureal@opensource.cirrus.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20220303173059.269657-3-tanureal@opensource.cirrus.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-Proofpoint-GUID: 6I9BDi-CgjIff8cp0m2Vg-QPVTmpnu2h X-Proofpoint-ORIG-GUID: 6I9BDi-CgjIff8cp0m2Vg-QPVTmpnu2h X-Proofpoint-Spam-Reason: safe X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 03, 2022 at 05:30:41PM +0000, Lucas Tanure wrote: > This device only has 4 TX channels. > > Fixes: fe1024d50477b ("ASoC: cs35l41: Combine adjacent register writes") > Signed-off-by: Lucas Tanure > --- Acked-by: Charles Keepax Thanks, Charles