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From:   Alexandre Bailon <abailon@baylibre.com>
To:     ohad@wizery.com, bjorn.andersson@linaro.org,
        mathieu.poirier@linaro.org, robh+dt@kernel.or
Cc:     matthias.bgg@gmail.com, linux-remoteproc@vger.kernel.org,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
        stephane.leprovost@mediatek.com, khilman@baylibre.com,
        Julien STEPHAN <jstephan@baylibre.com>,
        Alexandre Bailon <abailon@baylibre.com>
Subject: [PATCH v4 5/7] remoteproc: mtk_apu: Use match_data
Date:   Fri,  4 Mar 2022 17:15:12 +0100
Message-Id: <20220304161514.994128-6-abailon@baylibre.com>
In-Reply-To: <20220304161514.994128-1-abailon@baylibre.com>
References: <20220304161514.994128-1-abailon@baylibre.com>
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From: Julien STEPHAN <jstephan@baylibre.com>

This commits prepare the driver to be more generic in order to support
multiple platform using the compatible property.
To do that, put some register values and the clocks names inside
private data.

Signed-off-by: Julien STEPHAN <jstephan@baylibre.com>
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
---
 drivers/remoteproc/mtk_apu.c | 35 ++++++++++++++++++++++++++++-------
 1 file changed, 28 insertions(+), 7 deletions(-)

diff --git a/drivers/remoteproc/mtk_apu.c b/drivers/remoteproc/mtk_apu.c
index 3905eb5b7174..deec51b86ba5 100644
--- a/drivers/remoteproc/mtk_apu.c
+++ b/drivers/remoteproc/mtk_apu.c
@@ -58,12 +58,20 @@
 
 #define APU_RESET_DELAY				(27)
 
+struct mtk_apu_conf {
+	u32 core_default0;
+	u32 core_default1;
+	u32 num_clks;
+	const char * const *clk_names;
+};
+
 struct mtk_apu_rproc {
 	struct device *dev;
 	void __iomem *base;
 	int irq;
 	unsigned int num_clks;
 	struct clk_bulk_data *clks;
+	struct mtk_apu_conf *conf;
 	struct iommu_domain *domain;
 	struct list_head mappings;
 
@@ -81,6 +89,13 @@ static const char * const mt8183_clk_names[] = {
 	"jtag"
 };
 
+static const struct mtk_apu_conf mt8183_conf = {
+	.core_default0 = (0x10 << 23) | (0x10 << 18),
+	.core_default1 = (0x10 << 0) | (0x10 << 5),
+	.num_clks = ARRAY_SIZE(mt8183_clk_names),
+	.clk_names = mt8183_clk_names
+};
+
 static int mtk_apu_iommu_map(struct rproc *rproc, struct rproc_mem_entry *entry)
 {
 	struct mtk_apu_rproc *apu_rproc = rproc->priv;
@@ -289,10 +304,9 @@ static int mtk_apu_rproc_start(struct rproc *rproc)
 	writel(core_ctrl, apu_rproc->base + CORE_CTRL);
 
 	/* Configure memory accesses to go through the IOMMU */
-	writel(CORE_DEFAULT0_AWUSER_USE_IOMMU | CORE_DEFAULT0_ARUSER_USE_IOMMU |
-	      CORE_DEFAULT0_QOS_SWAP_1, apu_rproc->base + CORE_DEFAULT0);
-	writel(CORE_DEFAULT0_AWUSER_IDMA_USE_IOMMU |
-		CORE_DEFAULT0_ARUSER_IDMA_USE_IOMMU,
+	writel(apu_rproc->conf->core_default0 | CORE_DEFAULT0_QOS_SWAP_1,
+		apu_rproc->base + CORE_DEFAULT0);
+	writel(apu_rproc->conf->core_default1,
 		apu_rproc->base + CORE_DEFAULT1);
 
 	/* Release the APU */
@@ -565,11 +579,18 @@ static int mtk_apu_rproc_probe(struct platform_device *pdev)
 		goto free_rproc;
 	}
 
-	apu_rproc->num_clks = ARRAY_SIZE(mt8183_clk_names);
+
+	apu_rproc->conf = (struct mtk_apu_conf *)device_get_match_data(dev);
+	if (!apu_rproc->conf) {
+		ret = -ENODEV;
+		goto free_rproc;
+	}
+
+	apu_rproc->num_clks = apu_rproc->conf->num_clks;
 	apu_rproc->clks = devm_kcalloc(dev, apu_rproc->num_clks,
 				     sizeof(*apu_rproc->clks), GFP_KERNEL);
 	for (i = 0; i < apu_rproc->num_clks; ++i)
-		apu_rproc->clks[i].id = mt8183_clk_names[i];
+		apu_rproc->clks[i].id = apu_rproc->conf->clk_names[i];
 
 	ret = devm_clk_bulk_get(dev, apu_rproc->num_clks, apu_rproc->clks);
 	if (ret) {
@@ -611,7 +632,7 @@ static int mtk_apu_rproc_remove(struct platform_device *pdev)
 }
 
 static const struct of_device_id mtk_apu_rproc_of_match[] = {
-	{ .compatible = "mediatek,mt8183-apu", },
+	{ .compatible = "mediatek,mt8183-apu", .data = &mt8183_conf },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mtk_apu_rproc_of_match);
-- 
2.34.1