Received: by 2002:a05:6a10:9afc:0:0:0:0 with SMTP id t28csp2261280pxm; Fri, 4 Mar 2022 12:34:09 -0800 (PST) X-Google-Smtp-Source: ABdhPJyWt7zLnZGATPaMbAEjsCaab60mGchMx4aAGI2eJtaecWc/8uSlms60PhILQeNYj7U8hxDs X-Received: by 2002:aa7:982d:0:b0:4e1:56d4:1e78 with SMTP id q13-20020aa7982d000000b004e156d41e78mr389699pfl.24.1646426049454; Fri, 04 Mar 2022 12:34:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1646426049; cv=none; d=google.com; s=arc-20160816; b=Vc2kBD2EMrUwpGDBoPHn8B4m5ApYcKm9K+qiSHQPemYRRat/l5xT8j2nAigI9zpneT heN5MGRWRSjJlsxj4sARW0SJmB2ftMy3lmMCiRrzgmT9pFh66PfFZS37RQuUDLzNoGvb BPX06mOsmpS/nFFAYGV18KsB92DnbvJ/Y6VPP26bQu+nxh60sOJCChSJ99Bv5sa3/GIQ 5GTeoeQdrHjO4ElnHTBkgPqnKPwVDIVfdSArF2rhtOSYjtHOrsHnoQfCasd/LbtuYRFG LWMLMZq60A9UWNDqfUwU7/o+eWl2/K/0LTZaCP3axV6iDNvE+Llz9QuqGcG0BQ2su+kS u7EA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=daJDyyFNFa/9KfOr+W17mU/qCLewhAAZQvnpLpKjfuw=; b=jNeZaJjKV0W/WyQIWyE2pYeTz0th16sXIYnfqwHZucpH2oh/gfidg4mGVq0PrbNvv+ OciEDEXeUn2trKe3UGwv2WetalZ0+80fhhmeGgYUjdGx8OJ/BT7l2C2hKQKljg6/45az m6Sclh6psI4fw1dAZkzCaviDACbIROpd4o0oWHok+1XTyJvEVZHOL8zZRbxsOQ1i6Fdr //NUB/DlF927fb2h8vQ+zo0Jw+skZLsMTaRWrvAgwrfNJGRqrqgLH8vSrr4EExGn2hlF WmssmVvjTb44DwLBFYlTudJvGX/EMILKS/EAZfI0nVMcgDpcOZiA6IUh022x0nEVOoWY xT6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=RsawoB1q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id j15-20020aa78dcf000000b004f3ee536ec6si3758190pfr.95.2022.03.04.12.33.53; Fri, 04 Mar 2022 12:34:09 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=RsawoB1q; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230382AbiCDUeE (ORCPT + 99 others); Fri, 4 Mar 2022 15:34:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229897AbiCDUcU (ORCPT ); Fri, 4 Mar 2022 15:32:20 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02A1A1EE9C3; Fri, 4 Mar 2022 12:31:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1646425891; x=1677961891; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=b2RfUB5kBZejFPlHKQFlwDXq9RRGn2GdmL23fM0GzEg=; b=RsawoB1qqzaoToP98SX1Wj7kLc4QuwMTjBmcg5tO1fZELDqv7VwySNka PWBHX5XMf2Ek4Jw47jlOsMI3p5L8iqGrDiMak6NTVZTRUBHyr0D4x0EVo PR65LYLqTxccHt82iLYda+PBty+j+syWfJJZpecG2kZhZ+tZuj1Ly06eG M0iLM8PP6deFt6Sdbxp1JGVw+xOphR0lsNFbVBJ7HgTcsYRhwg99EVHgx rgZ30iL8g011MYJU5OutIaSL5ttkthT9HH4DJbNy6bVXz1Tn7SYwRQ+06 XeQCbrePK4hNOekii/dxrc59fqzR74DtaDfCvpc+DowHPJ6IXJHXjH0LD Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10276"; a="251624263" X-IronPort-AV: E=Sophos;i="5.90,156,1643702400"; d="scan'208";a="251624263" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2022 11:50:33 -0800 X-IronPort-AV: E=Sophos;i="5.90,156,1643702400"; d="scan'208";a="552344458" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2022 11:50:32 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , Jim Mattson , erdemaktas@google.com, Connor Kuehl , Sean Christopherson Subject: [RFC PATCH v5 066/104] KVM: TDX: restore host xsave state when exit from the guest TD Date: Fri, 4 Mar 2022 11:49:22 -0800 Message-Id: <9bdf380cfa2c8a6fa064f1ece65ed95bad784c67.1646422845.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Isaku Yamahata On exiting from the guest TD, xsave state is clobbered. Restore xsave state on TD exit. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/vmx/tdx.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 7a288aae03ba..54be5be1a06c 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -2,6 +2,7 @@ #include #include +#include #include #include "capabilities.h" @@ -549,6 +550,22 @@ void tdx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) vcpu->kvm->vm_bugged = true; } +static void tdx_restore_host_xsave_state(struct kvm_vcpu *vcpu) +{ + struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu->kvm); + + if (static_cpu_has(X86_FEATURE_XSAVE) && + host_xcr0 != (kvm_tdx->xfam & supported_xcr0)) + xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0); + if (static_cpu_has(X86_FEATURE_XSAVES) && + /* PT can be exposed to TD guest regardless of KVM's XSS support */ + host_xss != (kvm_tdx->xfam & (supported_xss | XFEATURE_MASK_PT))) + wrmsrl(MSR_IA32_XSS, host_xss); + if (static_cpu_has(X86_FEATURE_PKU) && + (kvm_tdx->xfam & XFEATURE_MASK_PKRU)) + write_pkru(vcpu->arch.host_pkru); +} + u64 __tdx_vcpu_run(hpa_t tdvpr, void *regs, u32 regs_mask); static noinstr void tdx_vcpu_enter_exit(struct kvm_vcpu *vcpu, @@ -572,6 +589,7 @@ fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu) tdx_vcpu_enter_exit(vcpu, tdx); + tdx_restore_host_xsave_state(vcpu); tdx->host_state_need_restore = true; vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET; -- 2.25.1