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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id e13-20020a9d490d000000b005b029275a9csm2945058otf.58.2022.03.04.14.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 14:22:46 -0800 (PST) Received: (nullmailer pid 546919 invoked by uid 1000); Fri, 04 Mar 2022 22:22:44 -0000 Date: Fri, 4 Mar 2022 16:22:44 -0600 From: Rob Herring To: Srinivasa Rao Mandadapu Cc: pierre-louis.bossart@linux.intel.com, alsa-devel@alsa-project.org, perex@perex.cz, bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org, judyhsiao@chromium.org, linux-kernel@vger.kernel.org, vkoul@kernel.org, Venkata Prasad Potturu , quic_plai@quicinc.com, sanyog.r.kale@intel.com, tiwai@suse.com, broonie@kernel.org, rohitkr@codeaurora.org, devicetree@vger.kernel.org, swboyd@chromium.org, bgoswami@codeaurora.org, robh+dt@kernel.org, yung-chuan.liao@linux.intel.com, agross@kernel.org, lgirdwood@gmail.com, srinivas.kandagatla@linaro.org Subject: Re: [PATCH v7 2/2] dt-bindings: soundwire: qcom: Add bindings for audio clock reset control property Message-ID: References: <1646316128-21082-1-git-send-email-quic_srivasam@quicinc.com> <1646316128-21082-3-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1646316128-21082-3-git-send-email-quic_srivasam@quicinc.com> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 03 Mar 2022 19:32:08 +0530, Srinivasa Rao Mandadapu wrote: > Update description for audio clock reset control property, which is required > for latest chipsets, to allow rx, tx and wsa bus clock enabling in software > control mode by configuring dynamic clock gating control registers. > > Signed-off-by: Srinivasa Rao Mandadapu > Co-developed-by: Venkata Prasad Potturu > Signed-off-by: Venkata Prasad Potturu > --- > Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > Acked-by: Rob Herring