Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To:     shawnguo@kernel.org, Richard Zhu <hongxing.zhu@nxp.com>,
        bhelgaas@google.com, l.stach@pengutronix.de
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-imx@nxp.com,
        linux-pci@vger.kernel.org
Subject: Re: (subset) [PATCH v4 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support
Date:   Mon,  7 Mar 2022 11:09:53 +0000
Message-Id: <164665133421.20091.3372213554169695625.b4-ty@arm.com>
In-Reply-To: <1645425237-4071-1-git-send-email-hongxing.zhu@nxp.com>
References: <1645425237-4071-1-git-send-email-hongxing.zhu@nxp.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 8bit
Precedence: bulk

On Mon, 21 Feb 2022 14:33:56 +0800, Richard Zhu wrote:
> In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
> is powered up by vgen3 and used as the PCIe reference clock source by
> the endpoint device.
> 
> If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
> has to be in bypass mode, and ENET clocks would be messed up.
> 
> [...]

I skipped patch(1) since we don't apply dts changes, those should
go via respective platform maintainers.

[2/2] PCI: imx6: Enable i.MX6QP PCIe power management support
      https://git.kernel.org/lpieralisi/pci/c/f81dd043ec

Thanks,
Lorenzo