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[23.128.96.19]) by mx.google.com with ESMTPS id j6-20020a170903024600b001500e08d601si284420plh.476.2022.03.08.15.17.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 15:17:13 -0800 (PST) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 9257A7E5A6; Tue, 8 Mar 2022 15:11:56 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350241AbiCHUbR (ORCPT + 99 others); Tue, 8 Mar 2022 15:31:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242939AbiCHUbP (ORCPT ); Tue, 8 Mar 2022 15:31:15 -0500 Received: from bmailout3.hostsharing.net (bmailout3.hostsharing.net [IPv6:2a01:4f8:150:2161:1:b009:f23e:0]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C09B50E1D; Tue, 8 Mar 2022 12:30:17 -0800 (PST) Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "*.hostsharing.net", Issuer "RapidSSL TLS DV RSA Mixed SHA256 2020 CA-1" (verified OK)) by bmailout3.hostsharing.net (Postfix) with ESMTPS id CA940100D9423; Tue, 8 Mar 2022 21:30:14 +0100 (CET) Received: by h08.hostsharing.net (Postfix, from userid 100393) id AA23147A006; Tue, 8 Mar 2022 21:30:14 +0100 (CET) Date: Tue, 8 Mar 2022 21:30:14 +0100 From: Lukas Wunner To: Andy Shevchenko Cc: Ilpo =?iso-8859-1?Q?J=E4rvinen?= , "open list:SERIAL DRIVERS" , Jiri Slaby , Greg Kroah-Hartman , Linux Kernel Mailing List , Johan Hovold , Heikki Krogerus , Raymond Tan , Heiko Stuebner Subject: Re: [PATCH 1/7] serial: 8250_dwlib: RS485 HW half duplex support Message-ID: <20220308203014.GA11096@wunner.de> References: <20220306184857.GA19394@wunner.de> <20220307191854.GA27748@wunner.de> <6931d6ad-7520-b585-a8ba-35349e730bb@linux.intel.com> <20220308122220.GA24694@wunner.de> <20220308145042.GA20520@wunner.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 08, 2022 at 04:53:56PM +0200, Andy Shevchenko wrote: > On Tue, Mar 8, 2022 at 4:50 PM Lukas Wunner wrote: > > Of course, if hardware-assisted DE assertion requires a particular pinmux > > state, we could double-check whether that pinmux state is set. > > I'm wondering how to achieve this. On DT platforms, the devicetree specifies the pin controller settings which need to be configured for a device to be usable, e.g.: pinctrl-names = "default"; pinctrl-0 = <...>; Before a driver is bound to the device, really_probe() in drivers/base/dd.c calls pinctrl_bind_pins() which configures the pin controller accordingly. In other words, the OS is fully in charge of configuring the pinmux. I'm not sure how this is done on ACPI platforms. If the pinmux is exclusively under the control of the platform firmware and the OS has no way of getting or setting the pinmux configuration, then that would be a competitive disadvantage vis-?-vis DT platforms which should really be addressed. However I notice there are various drivers for Intel chipsets in drivers/pinctrl/intel/, so surely there's a way to let the OS handle pinmux settings? Thanks, Lukas