Received: by 2002:a05:6a10:413:0:0:0:0 with SMTP id 19csp3535741pxp; Tue, 8 Mar 2022 16:53:07 -0800 (PST) X-Google-Smtp-Source: ABdhPJxsvI+PLOJ66PBaZBsqgLiAgQhfKevG8LtuWdrPa9rN8b12EC7kYw2KSL/MPWMsA0Ex/uCE X-Received: by 2002:a17:903:11c7:b0:151:7290:ccc with SMTP id q7-20020a17090311c700b0015172900cccmr20454891plh.95.1646787187334; Tue, 08 Mar 2022 16:53:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1646787187; cv=none; d=google.com; s=arc-20160816; b=JbkRIrvi2x9zWJmXD7VDM5ZLwcv85NZ5N05eUYOgy2TDDv1NwZbLZuMiCqIMy0Isrs NRnmCct13GNA5B26HnrCwjj2wg0zTmZ5k0JXPcHmwH/YYgsVGw9BiONqRzzTibInUFXt wl0EWNUWWwnpViMxVDY9QbWHGvkcakjaLbz1J36z3HS46wE08C0GACjlQuZUA4WjyGUF l3n++UVSdJ7RQbniowFJzShCYUgoSyb2bYthu6bwbDCukg2oVPy8EDjca0GFbPRiyPU+ k7ZIbnmVqivXVLZKzQyDpv3M2+An47Hjv3GKfNfBWRoaxkxzH4GujQzwq1GHkkclbSqC v9kQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=NVuIvNO1SiMk1OlfHOVvgya6s8a6LaSmC5+kkGp4lOM=; b=TG+S9Zy1CevemQxoVqwaWd/lg4GPbM+IEt69PLxPtlk5+whmtZzAiolx9/HQMCWwgp QG/iGiMFr1Hu5QZYiVOMAFYpj9m2GA2boRiWZcAG4Yv4uzfwZ+cfsH435YMxjRZ/mPKz qwKNkz+shttR/0BD+2pcvW7GiD1vsF0l2IA48slsqo/o12iJB7eJyhe0OSNiv4f9gk3r k8UWJpRrtnXBlv2qTcAABI3iUfZ/9F1apPC0IUC6X+sTtjR+2nyqToC813H4V4GYa14d 8yDM6ZXOrLpuWhB5LYCbVR1W22K36UbAGWNfif4QMS34zsXl7/j1W3S3F8AjqA6h4St+ BuwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=fSA7nw4d; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [23.128.96.19]) by mx.google.com with ESMTPS id j15-20020a65558f000000b003759f4a6d77si386388pgs.64.2022.03.08.16.53.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 16:53:07 -0800 (PST) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=fSA7nw4d; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7E447E7F65; Tue, 8 Mar 2022 16:08:12 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346572AbiCHLuf (ORCPT + 99 others); Tue, 8 Mar 2022 06:50:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235291AbiCHLub (ORCPT ); Tue, 8 Mar 2022 06:50:31 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D12B22E084; Tue, 8 Mar 2022 03:49:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1646740171; x=1678276171; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=hptAeT1aRWP2UIvZ3fkUSKXBKuDV4uGYtvodri9TAc4=; b=fSA7nw4dIwFXAJWNA5QOX5x/1P/ZWKvBzR6j5ASQF8eHw7m1Qz+4OaoQ aXuEbCVXIgGsQT6Sa3yT0c/OzkREOSkRr5FK22Ws4GFCQuK4ryLP+8m0h 82td6G00Btk2LcrHSZzxS5SE9Yf73Li/myZt0KUM/2nZfgU+A4b+MR90P 9mcnbsguh3CFmTVUHP5F30DW/ncK61CVpwkfzOi8tJoT2PYJH0a1se6JZ 2ANDGGaw3oOON/pddAau6HWs8rbYifOyvcUIxSpc91OD51s0roy8WdGNg BVVWWlItEd+OlaKQnLfbzuiBG2dUQHHM9tco4yKWqfggSsdKFpAt+nz9j g==; X-IronPort-AV: E=McAfee;i="6200,9189,10279"; a="252236217" X-IronPort-AV: E=Sophos;i="5.90,164,1643702400"; d="scan'208";a="252236217" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Mar 2022 03:49:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,164,1643702400"; d="scan'208";a="687896769" Received: from kuha.fi.intel.com ([10.237.72.185]) by fmsmga001.fm.intel.com with SMTP; 08 Mar 2022 03:49:28 -0800 Received: by kuha.fi.intel.com (sSMTP sendmail emulation); Tue, 08 Mar 2022 13:49:27 +0200 Date: Tue, 8 Mar 2022 13:49:27 +0200 From: Heikki Krogerus To: Alvin =?utf-8?Q?=C5=A0ipraga?= Cc: Alvin =?utf-8?Q?=C5=A0ipraga?= , Greg Kroah-Hartman , Rob Herring , "linux-usb@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 3/4] usb: typec: add TUSB320xA driver Message-ID: References: <20220301132010.115258-1-alvin@pqrs.dk> <20220301132010.115258-4-alvin@pqrs.dk> <87lexlcsrj.fsf@bang-olufsen.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <87lexlcsrj.fsf@bang-olufsen.dk> X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 07, 2022 at 10:17:04PM +0000, Alvin Šipraga wrote: > Hi Heikki, > > Heikki Krogerus writes: > > > Hi, > > > > On Tue, Mar 01, 2022 at 02:20:07PM +0100, Alvin Šipraga wrote: > >> From: Alvin Šipraga > >> > >> The TUSB320LA and TUSB320HA (or LAI, HAI) chips are I2C controlled > >> non-PD Type-C port controllers. They support detection of cable > >> orientation, port attachment state, and role, including Audio Accessory > >> and Debug Accessory modes. Add a typec class driver for this family. > >> > >> Note that there already exists an extcon driver for the TUSB320 (a > >> slightly older revision that does not support setting role preference or > >> disabling the CC state machine). This driver is loosely based on that > >> one. > > > > This looked mostly OK to me. There is one question below. > > > > > > > >> +static int tusb320xa_check_signature(struct tusb320xa *tusb) > >> +{ > >> + static const char sig[] = { '\0', 'T', 'U', 'S', 'B', '3', '2', '0' }; > >> + unsigned int val; > >> + int i, ret; > >> + > >> + mutex_lock(&tusb->lock); > >> + > >> + for (i = 0; i < sizeof(sig); i++) { > >> + ret = regmap_read(tusb->regmap, sizeof(sig) - 1 - i, &val); > >> + if (ret) > >> + goto done; > >> + > >> + if (val != sig[i]) { > >> + dev_err(tusb->dev, "signature mismatch!\n"); > >> + ret = -ENODEV; > >> + goto done; > >> + } > >> + } > >> + > >> +done: > >> + mutex_unlock(&tusb->lock); > >> + > >> + return ret; > >> +} > > > > Couldn't that be done with a single read? > > > > char sig[8]; > > u64 val; > > > > strcpy(sig, "TUSB320") > > > > mutex_lock(&tusb->lock); > > > > ret = regmap_raw_read(tusb->regmap, 0, &val, sizeof(val)); > > ... > > if (val != cpu_to_le64(*(u64 *)sig)) { > > ... > > > > Something like that? > > I think it's a bit cryptic - are you sure it's worth it just to save 8 > one-off regmap_read()s? I could also just remove this check... I see it > mostly as a courtesy to the user in case the I2C address in his device > tree mistakenly points to some other unsuspecting chip. > > BTW, do you have any feedback on the device tree bindings of this > series? Rob had some questions and I am not sure that my proposed > bindings are fully aligned with the typec subsystem expectations. Any > feedback would be welcome. I don't think I understand DT well enough to comment. I'm not completely sure what he's asking.. > I will wait for more comments and send a v2 in ~a week. thanks, -- heikki