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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id s6-20020a17090aba0600b001bfa81a38e8si546659pjr.36.2022.03.08.16.54.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 16:54:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BGr5gudF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id CEC5A15FCA6; Tue, 8 Mar 2022 16:07:32 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345976AbiCHLGE (ORCPT + 99 others); Tue, 8 Mar 2022 06:06:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245546AbiCHLGD (ORCPT ); Tue, 8 Mar 2022 06:06:03 -0500 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C1DE41FBA for ; Tue, 8 Mar 2022 03:05:06 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id g39so31483814lfv.10 for ; Tue, 08 Mar 2022 03:05:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=0HiFFHplwuG4zm1Rr+rVXkq22q8xtVPCcUR+EBSBuBs=; b=BGr5gudFns+UxCKjsQxhMavcMBe9ynwXAs/M919w79Ifw9WRIjpwGj4F5pQ2vd6aly /HhoIl7QqL2wCGyA9eRHQPlE9TogbzHwCrDLGc9T1w6gbmlPFxUM4f77j9qRk7pRb7ej qZfMJOVeyZPPbv2JLJ3nb2A/sOiWrjJVYtS80J0uHt5rJT99Bs9CC76H8JsnVBlrEZAp /g0K94ZDw5uakcvk+dZjWXFxIks/C2qJf9QVWf7+mhB+dtGkiDEPIZpXfytDq0OR8q61 DkXsC7v7eT2HofrRp2KgHHEb0uPWROHHLr7UQ/dipzdBxNYn0R6JQZpqk4VfUeXkLuRL At3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=0HiFFHplwuG4zm1Rr+rVXkq22q8xtVPCcUR+EBSBuBs=; b=Dkjbi4asOKJa3I1ieBXWAUCGXjFrNVoc0eWtpgPBHt9AkMRjQqWA7b1zp1GZr9gBGW WZUdKXq9g/cPdD5r/LGfUn1P4f3CDO5NBhgCpUpyR2530LsHnbC+EI5+YbBgeKX0DHyK wr26medTbHUl3muXq88cJR9YPTMXPj//1s94EkbS4Mb3IKv9a5+o0B9MbcwHMy2Jy0Dj ZcCNLY3cpqSvqJbeOWxonM9rFXLNYEXVYam09Nn4XsLmauONpWjdcwFsISQMKejqcTfm qWH9ElBPvVirOx8WF2YO05Nz32MjfiYwLJFp68lzsi9eNBrYlp3wz4rPT7sNCluZHe6m fZeQ== X-Gm-Message-State: AOAM533WbdbnvNcrh8TyUoei1MaSff/sPObK9pfAxtn31RJXIoN6LTcp rwTlKDw/vXBf9zHlLhXu808NvBb8v2EWrPjmFByHFA== X-Received: by 2002:a05:6512:6ce:b0:448:46c6:b93e with SMTP id u14-20020a05651206ce00b0044846c6b93emr996065lff.46.1646737504364; Tue, 08 Mar 2022 03:05:04 -0800 (PST) MIME-Version: 1.0 References: <20220308103012.GA31267@willie-the-truck> In-Reply-To: <20220308103012.GA31267@willie-the-truck> From: Vincent Guittot Date: Tue, 8 Mar 2022 12:04:53 +0100 Message-ID: Subject: Re: [PATCH v3] topology: make core_mask include at least cluster_siblings To: Will Deacon Cc: Darren Hart , LKML , Linux Arm , Sudeep Holla , Greg Kroah-Hartman , "Rafael J. Wysocki" , Catalin Marinas , Peter Zijlstra , Barry Song , Valentin Schneider , "D . Scott Phillips" , Ilkka Koskinen , stable@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 8 Mar 2022 at 11:30, Will Deacon wrote: > > On Fri, Mar 04, 2022 at 09:01:36AM -0800, Darren Hart wrote: > > Ampere Altra defines CPU clusters in the ACPI PPTT. They share a Snoop > > Control Unit, but have no shared CPU-side last level cache. > > > > cpu_coregroup_mask() will return a cpumask with weight 1, while > > cpu_clustergroup_mask() will return a cpumask with weight 2. > > > > As a result, build_sched_domain() will BUG() once per CPU with: > > > > BUG: arch topology borken > > the CLS domain not a subset of the MC domain > > > > The MC level cpumask is then extended to that of the CLS child, and is > > later removed entirely as redundant. This sched domain topology is an > > improvement over previous topologies, or those built without > > SCHED_CLUSTER, particularly for certain latency sensitive workloads. > > With the current scheduler model and heuristics, this is a desirable > > default topology for Ampere Altra and Altra Max system. > > > > Rather than create a custom sched domains topology structure and > > introduce new logic in arch/arm64 to detect these systems, update the > > core_mask so coregroup is never a subset of clustergroup, extending it > > to cluster_siblings if necessary. > > > > This has the added benefit over a custom topology of working for both > > symmetric and asymmetric topologies. It does not address systems where > > the cluster topology is above a populated mc topology, but these are not > > considered today and can be addressed separately if and when they > > appear. > > > > The final sched domain topology for a 2 socket Ampere Altra system is > > unchanged with or without CONFIG_SCHED_CLUSTER, and the BUG is avoided: > > > > For CPU0: > > > > CONFIG_SCHED_CLUSTER=y > > CLS [0-1] > > DIE [0-79] > > NUMA [0-159] > > > > CONFIG_SCHED_CLUSTER is not set > > DIE [0-79] > > NUMA [0-159] > > > > Cc: Sudeep Holla > > Cc: Greg Kroah-Hartman > > Cc: "Rafael J. Wysocki" > > Cc: Catalin Marinas > > Cc: Will Deacon > > Cc: Peter Zijlstra > > Cc: Vincent Guittot > > Cc: Barry Song > > Cc: Valentin Schneider > > Cc: D. Scott Phillips > > Cc: Ilkka Koskinen > > Cc: # 5.16.x > > Suggested-by: Barry Song > > Signed-off-by: Darren Hart > > --- > > v1: Drop MC level if coregroup weight == 1 > > v2: New sd topo in arch/arm64/kernel/smp.c > > v3: No new topo, extend core_mask to cluster_siblings > > > > drivers/base/arch_topology.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c > > index 976154140f0b..a96f45db928b 100644 > > --- a/drivers/base/arch_topology.c > > +++ b/drivers/base/arch_topology.c > > @@ -628,6 +628,14 @@ const struct cpumask *cpu_coregroup_mask(int cpu) > > core_mask = &cpu_topology[cpu].llc_sibling; > > } > > > > + /* > > + * For systems with no shared cpu-side LLC but with clusters defined, > > + * extend core_mask to cluster_siblings. The sched domain builder will > > + * then remove MC as redundant with CLS if SCHED_CLUSTER is enabled. > > + */ > > + if (cpumask_subset(core_mask, &cpu_topology[cpu].cluster_sibling)) > > + core_mask = &cpu_topology[cpu].cluster_sibling; > > + > > Sudeep, Vincent, are you happy with this now? I would not say that I'm happy because this solution skews the core cpu mask in order to abuse the scheduler so that it will remove a wrong but useless level when it will build its domains. But this works so as long as the maintainer are happy, I'm fine > > Will