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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id a7-20020a17090abe0700b001bd14e0307asi3863921pjs.82.2022.03.08.17.54.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Mar 2022 17:54:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=fail header.i=@microchip.com header.s=mchp header.b=pRyZGQDa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id ED4D74E39D; Tue, 8 Mar 2022 16:28:48 -0800 (PST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240979AbiCHP0A (ORCPT + 99 others); Tue, 8 Mar 2022 10:26:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234280AbiCHPZ7 (ORCPT ); Tue, 8 Mar 2022 10:25:59 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF36C473B2; Tue, 8 Mar 2022 07:25:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646753103; x=1678289103; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=obCCS3BdzrwExG9xpWAFThjRl4GzkZv81IRkCSJcDnA=; b=pRyZGQDaNEZQlN649mHIkktJsEI+lOKKo4f3EXDRD3zjwmoNwl/DEv5A SbW+PKx2Fh7N2GaZJaYlZPDCF+Zsm1rMGWEJn1MXRLtBoqGvAA5naborV qx8ehenIE73VGDu3kAcRcfzb8RRLK+y2P65wpP+Sx/iJdPEVaiNRIdQf6 4V5RHtrhv+k/wHyZ/1kk21afSk+xrIyBKlEXEMJfdEajvL26kztZsDmA6 036UdU1NqTTizBj/yStn/mXJSkUbLknnIirrTLEqF38IcqKuUGlqlFN7m wDysKbzTfuDiKMRru7nE0kv3wesYUW6Y1fz5Oj3YnKBbtsji/TzI5WZ/B A==; X-IronPort-AV: E=Sophos;i="5.90,165,1643698800"; d="scan'208";a="155667355" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Mar 2022 08:25:03 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 8 Mar 2022 08:25:02 -0700 Received: from [10.12.73.60] (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 8 Mar 2022 08:25:00 -0700 Message-ID: <487711a7-baca-6992-6e5e-1ff19d54ad0b@microchip.com> Date: Tue, 8 Mar 2022 16:24:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH] clk: COMMON_CLK_LAN966X should depend on SOC_LAN966 Content-Language: en-US To: Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Horatiu Vultur , Kavyasree Kotagiri CC: , References: From: Nicolas Ferre Organization: microchip In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 24/02/2022 at 16:29, Geert Uytterhoeven wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > The LAN966x Generic Clock Controller is only present on Microchip > LAN966x SoCs. Hence add a dependency on SOC_LAN966, to prevent asking > the user about this driver when configuring a kernel without LAN966x SoC > support. > > Fixes: 54104ee023333e3b ("clk: lan966x: Add lan966x SoC clock driver") > Signed-off-by: Geert Uytterhoeven Horatiu, Kavyasree, We probably need your view on this. Best regards, Nicolas > --- > drivers/clk/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index c390e26dadf471f5..1c82a3e1129d4342 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -232,6 +232,7 @@ config COMMON_CLK_GEMINI > > config COMMON_CLK_LAN966X > bool "Generic Clock Controller driver for LAN966X SoC" > + depends on SOC_LAN966 || COMPILE_TEST > help > This driver provides support for Generic Clock Controller(GCK) on > LAN966X SoC. GCK generates and supplies clock to various peripherals > -- > 2.25.1 > -- Nicolas Ferre