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Date:   Wed, 9 Mar 2022 11:51:07 +0200 (EET)
From:   =?ISO-8859-15?Q?Ilpo_J=E4rvinen?= <ilpo.jarvinen@linux.intel.com>
To:     Lukas Wunner <lukas@wunner.de>
cc:     Andy Shevchenko <andy.shevchenko@gmail.com>,
        "open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
        Jiri Slaby <jirislaby@kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Johan Hovold <johan@kernel.org>,
        Heikki Krogerus <heikki.krogerus@linux.intel.com>,
        Raymond Tan <raymond.tan@intel.com>,
        Heiko Stuebner <heiko@sntech.de>
Subject: Re: [PATCH 1/7] serial: 8250_dwlib: RS485 HW half duplex support
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On Tue, 8 Mar 2022, Lukas Wunner wrote:

> On Tue, Mar 08, 2022 at 04:53:56PM +0200, Andy Shevchenko wrote:
> > On Tue, Mar 8, 2022 at 4:50 PM Lukas Wunner <lukas@wunner.de> wrote:
> > > Of course, if hardware-assisted DE assertion requires a particular pinmux
> > > state, we could double-check whether that pinmux state is set.
> > 
> > I'm wondering how to achieve this.
> 
> On DT platforms, the devicetree specifies the pin controller settings
> which need to be configured for a device to be usable, e.g.:
> 
>   pinctrl-names = "default";
>   pinctrl-0 = <...>;
> 
> Before a driver is bound to the device, really_probe() in drivers/base/dd.c
> calls pinctrl_bind_pins() which configures the pin controller accordingly.
> In other words, the OS is fully in charge of configuring the pinmux.
> 
> I'm not sure how this is done on ACPI platforms.  If the pinmux is
> exclusively under the control of the platform firmware and the OS has
> no way of getting or setting the pinmux configuration, then that would
> be a competitive disadvantage vis-?-vis DT platforms which should really
> be addressed.  However I notice there are various drivers for Intel
> chipsets in drivers/pinctrl/intel/, so surely there's a way to let the
> OS handle pinmux settings?

The problem here is that the driver ("we could double-check" in your 
initial suggestion above) doesn't know which pins it should check the 
states for. I don't think any general mapping exists between drivers and 
pins.

Based on what I read, the mapping is a feature not wanted into pinmuxing.
Assuming I understood them correctly, they don't want to do such thing
on kernel side (based on experience with earlier approaches with 
mapping. It probably got too messy/unmaintainable in the end :-)).
So at best, one can only read and control pin mux states but that's about 
as far as pinmuxing in kernel goes (and control could be locked by FW).

Anyway, I've implemented the detection now based on RE_EN non-zero write + 
read + check based on your suggestion (despite still thinking myself it 
has these obvious problems with pinmux & other hw config unrelated dw uart 
itself).


-- 
 i.

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