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[209.85.221.46]) by smtp.gmail.com with ESMTPSA id gr14-20020a170906e2ce00b006da9ea6377bsm1068207ejb.116.2022.03.09.11.25.37 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Mar 2022 11:25:37 -0800 (PST) Received: by mail-wr1-f46.google.com with SMTP id r10so4648124wrp.3 for ; Wed, 09 Mar 2022 11:25:37 -0800 (PST) X-Received: by 2002:a5d:5232:0:b0:1f7:7c4c:e48 with SMTP id i18-20020a5d5232000000b001f77c4c0e48mr811587wra.679.1646853936582; Wed, 09 Mar 2022 11:25:36 -0800 (PST) MIME-Version: 1.0 References: <1646758500-3776-1-git-send-email-quic_vpolimer@quicinc.com> <1646758500-3776-6-git-send-email-quic_vpolimer@quicinc.com> In-Reply-To: <1646758500-3776-6-git-send-email-quic_vpolimer@quicinc.com> From: Doug Anderson Date: Wed, 9 Mar 2022 11:25:24 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v5 5/5] drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe To: Vinod Polimera Cc: dri-devel , linux-arm-msm , freedreno , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , Rob Clark , Stephen Boyd , quic_kalyant@quicinc.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Tue, Mar 8, 2022 at 8:55 AM Vinod Polimera wrote: > > use max clock during probe/bind sequence from the opp table. > The clock will be scaled down when framework sends an update. > > Signed-off-by: Vinod Polimera > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++ > 1 file changed, 3 insertions(+) In addition to Dmitry's requests, can you also make this patch #1 in the series since the DTS stuff really ought to come _after_ this one. ...and actually, thinking about it further: 1. If we land this fix, we actually don't _need_ the dts patches, right? Sure, the clock rate will get assigned before probe but then we'll change it right away in probe, right? 2. If we land the dts patches _before_ the driver patch then it will be a regression, right? 3. The dts patches and driver patch will probably land through separate trees. The driver patch will go through the MSM DRM tree and the device tree patches through the Qualcomm armsoc tree, right? Assuming that the above is right, we should: 1. Put the driver patch first. 2. Remove the "Fixes" tag on the dts patches. I guess in theory we could have a FIxes tag on this patch? 3. Note in the dts patches commit messages that they depend on the driver patch. 4. Delay the dts patches until the driver change has made it to mainline. Does that sound reasonable?