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Date:   Thu, 10 Mar 2022 17:43:33 +0100
Message-ID: <s5hr179ep1m.wl-tiwai@suse.de>
From:   Takashi Iwai <tiwai@suse.de>
To:     <tanureal@opensource.cirrus.com>
Cc:     Liam Girdwood <lgirdwood@gmail.com>,
        Mark Brown <broonie@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Jaroslav Kysela <perex@perex.cz>,
        Takashi Iwai <tiwai@suse.com>, <alsa-devel@alsa-project.org>,
        <patches@opensource.cirrus.com>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>,
        Charles Keepax <ckeepax@opensource.cirrus.com>
Subject: Re: [PATCH v3 01/16] sound: cs35l41: Unify hardware configuration
In-Reply-To: <fa73e75d-9500-43c5-5697-b86a5fb594a0@opensource.cirrus.com>
References: <20220308171730.454587-1-tanureal@opensource.cirrus.com>
        <20220308171730.454587-2-tanureal@opensource.cirrus.com>
        <s5hbkydgbx2.wl-tiwai@suse.de>
        <fa73e75d-9500-43c5-5697-b86a5fb594a0@opensource.cirrus.com>
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On Thu, 10 Mar 2022 17:40:45 +0100,
<tanureal@opensource.cirrus.com> wrote:
> 
> On 3/10/22 1:44 PM, Takashi Iwai <tiwai@suse.de> wrote:
> > On Tue, 08 Mar 2022 18:17:15 +0100,
> > Lucas Tanure wrote:
> > > +enum cs35l41_gpio_func {
> > > +	CS35L41_HIZ,
> > > +	CS35L41_GPIO,
> > > +	CS35L41_INT_OPEN_DRAIN_GPIO2,
> > > +	CS35L41_MCLK,
> > > +	CS35L41_INT_PUSH_PULL_LOW_GPIO2,
> > > +	CS35L41_INT_PUSH_PULL_HIGH_GPIO2,
> > > +	CS35L41_PDM_CLK_GPIO2,
> > > +	CS35L41_PDM_DATA_GPIO2,
> > > +	CS35L41_MDSYNC_GPIO1 = 2,
> > > +	CS35L41_PDM_CLK_GPIO1 = 4,
> > > +	CS35L41_PDM_DATA_GPIO1 = 5,
> > >   };
> >
> > So CS35L41_MDSYNC_GPIO1 is identical with *_DRAIN_GPIO2, i.e. it's an
> > alias?
> >
> >
> > thanks,
> >
> > Takashi
> >
> 
> The value 2 sets GPIO1 as MDSYNC pin and GPIO2 as IRQ pin (Open drain).
> It could be the same label, like CS35L41_GPIO1_MDSYNC_GPIO2_IRQ, but I think separating them is better for understanding the code and organizing the code.

Yes, separating GPIO1 and GPIO2 would be less confusing.


thanks,

Takashi