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Subject: Re: [PATCH] drm/bridge: synopsys/dw-hdmi: set cec clock rate
From:   Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
In-Reply-To: <CAMdYzYq06QSmFAwCuTmBYy4LfQAQDxzx2PGc8HOB1iEjxXHGyg@mail.gmail.com>
Date:   Sun, 13 Mar 2022 17:14:49 +0100
Cc:     Andrzej Hajda <andrzej.hajda@intel.com>,
        Neil Armstrong <narmstrong@baylibre.com>,
        Robert Foss <robert.foss@linaro.org>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Jonas Karlman <jonas@kwiboo.se>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Pierre-Hugues Husson <phh@phh.me>,
        Archit Taneja <architt@codeaurora.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Robin Murphy <robin.murphy@arm.com>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>,
        =?utf-8?Q?Heiko_St=C3=BCbner?= <heiko@sntech.de>,
        dri-devel@lists.freedesktop.org,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
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Message-Id: <E86F11A4-011B-43ED-90D2-BB6BA9353A3F@gmail.com>
References: <20220126202427.3047814-1-pgwipeout@gmail.com>
 <3AFD1DD4-AF0A-4ECC-B4F5-E6BD6B9F1BB7@gmail.com>
 <CAMdYzYq06QSmFAwCuTmBYy4LfQAQDxzx2PGc8HOB1iEjxXHGyg@mail.gmail.com>
To:     Peter Geis <pgwipeout@gmail.com>
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> Wiadomo=C5=9B=C4=87 napisana przez Peter Geis <pgwipeout@gmail.com> w =
dniu 13.03.2022, o godz. 13:56:
>=20
>>=20
>=20
> I was worried about that, thanks for testing it.
> Can you send me the cec_clk rate before and after this patch?
>=20

Here it is:

working:
                                 enable  prepare  protect                =
                duty  hardware
   clock                          count    count    count        rate   =
accuracy phase  cycle    enable
=
--------------------------------------------------------------------------=
-----------------------------
clk_hdmi_cec                      1        2        0       32743        =
  0     0  50000         Y


non-working:
                                 enable  prepare  protect                =
                duty  hardware
   clock                          count    count    count        rate   =
accuracy phase  cycle    enable
=
--------------------------------------------------------------------------=
-----------------------------
clk_hdmi_cec                      1        2        0       32768        =
  0     0  50000         Y


dmesg
[   52.745988] cec-dw_hdmi: message 44 timed out
[   54.879307] cec-dw_hdmi: message 44 timed out
[   57.012654] cec-dw_hdmi: message 88 timed out
[   59.145973] cec-dw_hdmi: message 88 timed out


player:
2022-03-13 11:04:40.938355 E CECAdapter: =
CLinuxCECAdapterCommunication::Write - ioctl CEC_TRANSMIT failed - =
tx_status=3D00 errno=3D22
2022-03-13 11:04:40.938366 E CECAdapter: =
CLinuxCECAdapterCommunication::Write - ioctl CEC_TRANSMIT failed - =
tx_status=3D00 errno=3D22