Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Trevor Woerner <twoerner@gmail.com>
To:     linux-kernel@vger.kernel.org,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Jiri Slaby <jirislaby@kernel.org>
Cc:     linux-serial@vger.kernel.org
Subject: [PATCH v2 1/3] serial: 8250_fintek: Finish support for the F81865
Date:   Mon, 14 Mar 2022 08:18:56 -0400
Message-Id: <20220314121856.10112-1-twoerner@gmail.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

This driver only partially supports the F81865 device. The UART portions of
this SuperIO chip behave very similarly to the UART of the F81866, except
that the F81866 has 128-byte FIFOs whereas the F81865 has 16-byte FIFOs,
and the IRQ configuration is different. Therefore fill out the support for
the F81865 in the places where it is missing.

Tested at 1500000 baud on the iEi NANO-PV-D5251-R10 board.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
---
 drivers/tty/serial/8250/8250_fintek.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c
index 251f0018ae8c..47b15d2d9901 100644
--- a/drivers/tty/serial/8250/8250_fintek.c
+++ b/drivers/tty/serial/8250/8250_fintek.c
@@ -63,7 +63,12 @@
 #define F81216_LDN_HIGH	0x4
 
 /*
- * F81866/966 registers
+ * F81866/865/966 registers
+ *
+ * The UART portion of the F81865 functions very similarly to the UART
+ * portion of the F81866, so there's no need to duplicate all the #defines
+ * etc. The only differences are: the F81866 has 128-byte FIFOs whereas the
+ * F81865 has 16-byte FIFOs, and the IRQ configuration is different.
  *
  * The IRQ setting mode of F81866/966 is not the same with F81216 series.
  *	Level/Low: IRQ_MODE0:0, IRQ_MODE1:0
@@ -316,6 +321,7 @@ static void fintek_8250_set_termios(struct uart_port *port,
 		break;
 	case CHIP_ID_F81966:
 	case CHIP_ID_F81866:
+	case CHIP_ID_F81865:
 		reg = F81866_UART_CLK;
 		break;
 	default:
@@ -363,6 +369,7 @@ static void fintek_8250_set_termios_handler(struct uart_8250_port *uart)
 	case CHIP_ID_F81216H:
 	case CHIP_ID_F81966:
 	case CHIP_ID_F81866:
+	case CHIP_ID_F81865:
 		uart->port.set_termios = fintek_8250_set_termios;
 		break;
 
-- 
2.35.1.455.g1a4874565f