Received: by 2002:a05:6a10:413:0:0:0:0 with SMTP id 19csp3777241pxp; Tue, 15 Mar 2022 06:14:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxOpvMttjCCrrxqsmcBrXs+A3TI3XmQsyH3CEHibaVuZ4S9HZyJTcE3NU6gB71iiJ8FtDr0 X-Received: by 2002:a05:6870:232a:b0:db:360c:7f5a with SMTP id w42-20020a056870232a00b000db360c7f5amr1408490oao.230.1647350092780; Tue, 15 Mar 2022 06:14:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1647350092; cv=none; d=google.com; s=arc-20160816; b=yNvoClSFQ0h5ZEVuUZ8RlhlR3OJNDeCTjW8qzsSXg2lhQEnJxYt5v47BiAGCzyUNYk UFwzbjtNVymj/AtT5BArtwZMRrg8b8MK9Op8/KvNwkl3D1uGP64JTYQq3eIM4I+w66qw jJ7bo5d26O2HkvAMDJURRhF3ZPoZdnEBv2e0xf9YPdRkEcWiixu1JnJHFvJHbABf2hfe TeMsw0ALgYPKdruSG5hBiti0HG6fH0jo4SQLrTvmPNvB8m3AR4iw4RN5LokGj1ntzbbh zKoNtKht2wYvO33DxpR339pKzFi48uMcfC6OqTY7mvsv2JkYW2TCmWjekzdNPp0/Skah +bJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/Y+Gbqvlshrjv1zjLspVizYcTXQ7C9mRkGRQm9QTFUk=; b=X4l21gQM05Q7W65hiI0oYowDKJ7cYy1gYw0arC5hNksoZxusxyoyz6KcZugrCr0MrM cT+Wk6iLnpvgrTL1i3kI3wCpcUuc2G4xmWvvjtFqgud3A03FU4C11o+6+LNOsl1WcLx6 0xY/BqFVH35VoZ3mt/WMTt5j37JEVrfGsZPFxBdP1BnM/jbEU2IwTZrIdnMqzuw4b/A8 e1XaXLDeh/hYiNC5ausRQVwgXyv7zFYitlac4EClbAUZDHEe68XKhT60RK96Uek9Ilnd rtk+X4+SNxD2wR6SrQTqdGj92zrKJ7HpVildteveiU4wQHtu5eVVgwtpdslBWmX2uRdc kghA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=VB7zDodR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l6-20020a0568301d6600b005b25979e945si11029420oti.326.2022.03.15.06.14.39; Tue, 15 Mar 2022 06:14:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=VB7zDodR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239802AbiCNL5e (ORCPT + 99 others); Mon, 14 Mar 2022 07:57:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238323AbiCNL5T (ORCPT ); Mon, 14 Mar 2022 07:57:19 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A7D013CF2; Mon, 14 Mar 2022 04:55:54 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 13B0D60FF3; Mon, 14 Mar 2022 11:55:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 85370C36AE5; Mon, 14 Mar 2022 11:55:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1647258953; bh=mwnCZ0OQrFjkyrpo4OL0dRkI5nNOtDz6vfSYkzZWJPo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VB7zDodRXHLFV0jdF4zXtMbwV82X/ivjgGyaRvI7R+ALDXQapedXAkvahcDx/YMFF 7VOLLYflVZY+P3JKhXe8PTlYbUDC4XdJndeKvSkfH446/1m/Hb94oVuGkIrfx26S7R xzUv/1PS+BqwZt9Jynui9/TMvBiI8OUSu20SWdk0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Mark Featherston , Kris Bahnsen , Bartosz Golaszewski , Sasha Levin Subject: [PATCH 5.4 16/43] gpio: ts4900: Do not set DAT and OE together Date: Mon, 14 Mar 2022 12:53:27 +0100 Message-Id: <20220314112734.874519991@linuxfoundation.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220314112734.415677317@linuxfoundation.org> References: <20220314112734.415677317@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-8.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mark Featherston [ Upstream commit 03fe003547975680fdb9ff5ab0e41cb68276c4f2 ] This works around an issue with the hardware where both OE and DAT are exposed in the same register. If both are updated simultaneously, the harware makes no guarantees that OE or DAT will actually change in any given order and may result in a glitch of a few ns on a GPIO pin when changing direction and value in a single write. Setting direction to input now only affects OE bit. Setting direction to output updates DAT first, then OE. Fixes: 9c6686322d74 ("gpio: add Technologic I2C-FPGA gpio support") Signed-off-by: Mark Featherston Signed-off-by: Kris Bahnsen Signed-off-by: Bartosz Golaszewski Signed-off-by: Sasha Levin --- drivers/gpio/gpio-ts4900.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-ts4900.c b/drivers/gpio/gpio-ts4900.c index 1da8d0586329..410452306bf7 100644 --- a/drivers/gpio/gpio-ts4900.c +++ b/drivers/gpio/gpio-ts4900.c @@ -1,7 +1,7 @@ /* * Digital I/O driver for Technologic Systems I2C FPGA Core * - * Copyright (C) 2015 Technologic Systems + * Copyright (C) 2015, 2018 Technologic Systems * Copyright (C) 2016 Savoir-Faire Linux * * This program is free software; you can redistribute it and/or @@ -52,19 +52,33 @@ static int ts4900_gpio_direction_input(struct gpio_chip *chip, { struct ts4900_gpio_priv *priv = gpiochip_get_data(chip); - /* - * This will clear the output enable bit, the other bits are - * dontcare when this is cleared + /* Only clear the OE bit here, requires a RMW. Prevents potential issue + * with OE and data getting to the physical pin at different times. */ - return regmap_write(priv->regmap, offset, 0); + return regmap_update_bits(priv->regmap, offset, TS4900_GPIO_OE, 0); } static int ts4900_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { struct ts4900_gpio_priv *priv = gpiochip_get_data(chip); + unsigned int reg; int ret; + /* If changing from an input to an output, we need to first set the + * proper data bit to what is requested and then set OE bit. This + * prevents a glitch that can occur on the IO line + */ + regmap_read(priv->regmap, offset, ®); + if (!(reg & TS4900_GPIO_OE)) { + if (value) + reg = TS4900_GPIO_OUT; + else + reg &= ~TS4900_GPIO_OUT; + + regmap_write(priv->regmap, offset, reg); + } + if (value) ret = regmap_write(priv->regmap, offset, TS4900_GPIO_OE | TS4900_GPIO_OUT); -- 2.34.1