Received: by 2002:a05:6a10:413:0:0:0:0 with SMTP id 19csp3961305pxp; Tue, 15 Mar 2022 09:35:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyskONl+c197cFotoqGJUIoAZQvkOQR7vUioABo0YQSNt1V34TVvYq2lxbFGFMnpbGwYxYF X-Received: by 2002:a17:906:9749:b0:6db:ab21:744a with SMTP id o9-20020a170906974900b006dbab21744amr16957387ejy.764.1647362110871; Tue, 15 Mar 2022 09:35:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1647362110; cv=none; d=google.com; s=arc-20160816; b=gUF4AcDqGGB9oHMT3IIdGmnMJlHSam2EQILFp22OGE3sYer4gDs8oPjohY66R+X/OW 5L8JaTw9avY+s/UjvYxAlH2GCzb0dsxADIne12GuFEL7Lxuwzd4LvUas4+2O1no7AGMD lKOE4TtjOK9fKCv91gjnfEgX4de2UU1wNFowpdi6bce0MgM/nOGRFirMLAm/f7ASwTNL uz7+I4yVXaQdZoqL19TRV1HxcMmgnc1pg58P92rejDdtAHVYvRLPTX4aEXbP5/kE7dMt CG6E5+LOOJtfUhc2oqN/7WkETSMWiQMpQ1tPYD+wwx4v0zLB7dtWriZSSYR41Kil4rXo d5Tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NdlxOEXHta3nldi5+rUnfk14mOBt545/rt0pueW2R3Y=; b=u4RZ6ERmhhTbnjaGU6BVBk+HSnI54/FzT9Yu2/KevNg8nGcLZHcTxTscwoIwm4IikH bptQcgIwhnudNgIkE0/cHazoFuZKiH0OVsM+JN0YUEOTzQZHInlPMHDy90ZftKMTEjg/ 7kbrlxYodpM+gcZvTYsjtgwjBUijYrYQXOQE+fzBG5FQz6h7AAJPNh8zGlK3MwRQ4+vW gEKea8vMAORCXhCC52UGJdVisjBEYBx8UOhZlekY38t52nhnGDyhiaRf1IAsWBupjLkm yUrgBq6TcH+/aNgkQ9LrmcuHwRIyXXZfwW1RhmE9lw2HVW05AmbHWkch0sB7v4GX2cOn WIlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=aCujLUex; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hu13-20020a170907a08d00b006dba7da355asi5717531ejc.52.2022.03.15.09.34.44; Tue, 15 Mar 2022 09:35:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=aCujLUex; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240341AbiCNMEG (ORCPT + 99 others); Mon, 14 Mar 2022 08:04:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240667AbiCNMDZ (ORCPT ); Mon, 14 Mar 2022 08:03:25 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2AD0A4B42A; Mon, 14 Mar 2022 05:00:41 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 09560612DF; Mon, 14 Mar 2022 12:00:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F3D0BC36AF3; Mon, 14 Mar 2022 12:00:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1647259240; bh=YfpmRIDi6jRVe/IYxm/SbOg5cyruW3iEv4Tg+KggpLQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aCujLUexWtlmH1USnY5ghyM/poXVs6yoS390fZyXwluK7V1n20s5NYAgijr0ZxDjo BmkecdqV9kTSt7OPed0ebyLmcLHH2MKnHRq3JP2ujOxW415YKPp0igMso8uVwBnw4L eyuQXfZjY4xAWaQy57W3IZB47B43kPsGAzVJq17k= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Mark Featherston , Kris Bahnsen , Bartosz Golaszewski , Sasha Levin Subject: [PATCH 5.10 32/71] gpio: ts4900: Do not set DAT and OE together Date: Mon, 14 Mar 2022 12:53:25 +0100 Message-Id: <20220314112738.832032873@linuxfoundation.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220314112737.929694832@linuxfoundation.org> References: <20220314112737.929694832@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-8.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mark Featherston [ Upstream commit 03fe003547975680fdb9ff5ab0e41cb68276c4f2 ] This works around an issue with the hardware where both OE and DAT are exposed in the same register. If both are updated simultaneously, the harware makes no guarantees that OE or DAT will actually change in any given order and may result in a glitch of a few ns on a GPIO pin when changing direction and value in a single write. Setting direction to input now only affects OE bit. Setting direction to output updates DAT first, then OE. Fixes: 9c6686322d74 ("gpio: add Technologic I2C-FPGA gpio support") Signed-off-by: Mark Featherston Signed-off-by: Kris Bahnsen Signed-off-by: Bartosz Golaszewski Signed-off-by: Sasha Levin --- drivers/gpio/gpio-ts4900.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-ts4900.c b/drivers/gpio/gpio-ts4900.c index d885032cf814..d918d2df4de2 100644 --- a/drivers/gpio/gpio-ts4900.c +++ b/drivers/gpio/gpio-ts4900.c @@ -1,7 +1,7 @@ /* * Digital I/O driver for Technologic Systems I2C FPGA Core * - * Copyright (C) 2015 Technologic Systems + * Copyright (C) 2015, 2018 Technologic Systems * Copyright (C) 2016 Savoir-Faire Linux * * This program is free software; you can redistribute it and/or @@ -55,19 +55,33 @@ static int ts4900_gpio_direction_input(struct gpio_chip *chip, { struct ts4900_gpio_priv *priv = gpiochip_get_data(chip); - /* - * This will clear the output enable bit, the other bits are - * dontcare when this is cleared + /* Only clear the OE bit here, requires a RMW. Prevents potential issue + * with OE and data getting to the physical pin at different times. */ - return regmap_write(priv->regmap, offset, 0); + return regmap_update_bits(priv->regmap, offset, TS4900_GPIO_OE, 0); } static int ts4900_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { struct ts4900_gpio_priv *priv = gpiochip_get_data(chip); + unsigned int reg; int ret; + /* If changing from an input to an output, we need to first set the + * proper data bit to what is requested and then set OE bit. This + * prevents a glitch that can occur on the IO line + */ + regmap_read(priv->regmap, offset, ®); + if (!(reg & TS4900_GPIO_OE)) { + if (value) + reg = TS4900_GPIO_OUT; + else + reg &= ~TS4900_GPIO_OUT; + + regmap_write(priv->regmap, offset, reg); + } + if (value) ret = regmap_write(priv->regmap, offset, TS4900_GPIO_OE | TS4900_GPIO_OUT); -- 2.34.1