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[23.128.96.19]) by mx.google.com with ESMTPS id e17-20020a63e011000000b003816043efb3si887741pgh.424.2022.03.16.21.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 21:01:52 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b="xvcpf/v/"; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BE4F06CA74; Wed, 16 Mar 2022 20:44:37 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349941AbiCOQQs (ORCPT + 99 others); Tue, 15 Mar 2022 12:16:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240489AbiCOQQq (ORCPT ); Tue, 15 Mar 2022 12:16:46 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F27449921; Tue, 15 Mar 2022 09:15:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1647360934; x=1678896934; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=GV0TCfK4F7z4NNGahHA1Aii1fPduEtBUYoCf8fA5z8M=; b=xvcpf/v/v8MHF5vJHbrzXq/Hq4PTzSBaN7b9+JytjQuCInXc2f61AaPF pmBhyi/q0vH2jkeRVF9MCC6oGc71RkQoofrNMkbh/OsSUJ0FzvH3UlN61 43SQalJfwLXEffyHXYUqNarpek3QCWHSxn84ubDuqkb0deIBhUHf8yMXL A=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 15 Mar 2022 09:15:34 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Mar 2022 09:15:33 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Tue, 15 Mar 2022 09:15:33 -0700 Received: from [10.216.59.204] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 15 Mar 2022 09:15:29 -0700 Message-ID: <0f75ebf7-b893-a1a0-1581-6ec29e0be8c6@quicinc.com> Date: Tue, 15 Mar 2022 21:45:26 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node Content-Language: en-US To: Stephen Boyd , , , , , , , , , , CC: Venkata Prasad Potturu References: <1643887981-31011-1-git-send-email-quic_srivasam@quicinc.com> <1643887981-31011-3-git-send-email-quic_srivasam@quicinc.com> From: Srinivasa Rao Mandadapu Organization: Qualcomm In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/1/2022 3:01 AM, Stephen Boyd wrote: Thanks for your time Stephen!!! > Quoting Srinivasa Rao Mandadapu (2022-02-03 03:33:00) >> Add lpass cpu node for audio on sc7280 based platforms. >> >> Signed-off-by: Srinivasa Rao Mandadapu >> Co-developed-by: Venkata Prasad Potturu >> Signed-off-by: Venkata Prasad Potturu >> --- >> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 +++++++++++++++ >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++++++++++++++++++++++++++ >> 2 files changed, 87 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi >> index 2806888..a76b2d1 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi >> @@ -691,3 +691,31 @@ >> &vamacro { >> vdd-micb-supply = <&vreg_bob>; >> }; >> + >> +&lpass_cpu { >> + status = "okay"; >> + >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sec_mi2s_active>; > Is it a reset gpio? If so, make it a reset-gpios property. I couldn't > find the definition. It's not reset gpio. it's for I2S clk, data and ws. It is there in previous patch set, which is not applied yet. We did splitting this node as per functionality. will change here accordingly. > >> + >> + mi2s-secondary@1 { >> + reg = ; >> + qcom,playback-sd-lines = <0>; >> + }; >> + >> + hdmi-primary@5 { >> + reg = ; >> + }; >> + >> + wcd-rx@6 { >> + reg = ; >> + }; >> + >> + wcd-tx@19 { >> + reg = ; >> + }; >> + >> + va-tx@25 { >> + reg = ; >> + }; >> +}; >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> index 946eb01..c2da5ce 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> @@ -17,6 +17,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> / { >> @@ -1847,6 +1848,64 @@ >> #size-cells = <0>; >> }; >> >> + lpass_cpu: audio-subsystem@3260000 { >> + compatible = "qcom,sc7280-lpass-cpu"; >> + reg = <0 0x3260000 0 0xC000>, >> + <0 0x3280000 0 0x29000>, >> + <0 0x3340000 0 0x29000>, >> + <0 0x336C000 0 0x3000>, >> + <0 0x3987000 0 0x68000>, >> + <0 0x3B00000 0 0x29000>; > Lowercase hex. Pad out reg to 8 digits. Okay. > >> + reg-names = "lpass-rxtx-cdc-dma-lpm", >> + "lpass-rxtx-lpaif", >> + "lpass-va-lpaif", >> + "lpass-va-cdc-dma-lpm", >> + "lpass-hdmiif", >> + "lpass-lpaif"; > That 'lpass' prefix looks very redundant. Okay. Currently driver and documentation has mentioned similarly. Will take care from next time. > >> + >> + iommus = <&apps_smmu 0x1820 0>, >> + <&apps_smmu 0x1821 0>, >> + <&apps_smmu 0x1832 0>;