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Mon, 14 Mar 2022 06:47:16 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Mon, 14 Mar 2022 06:47:16 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Mon, 14 Mar 2022 06:47:16 -0500 Received: from [10.250.235.173] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 22EBlBgu022886; Mon, 14 Mar 2022 06:47:12 -0500 Message-ID: <1dfd6a3d-452a-1e71-ca26-1fffe6db1636@ti.com> Date: Mon, 14 Mar 2022 17:17:10 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v3 05/17] mtd: spinand: Define ctrl_ops for non-page read/write op templates Content-Language: en-US To: Boris Brezillon CC: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mark Brown , Patrice Chotard , Christophe Kerello , Daniel Palmer , Alexander Lobakin , , , , References: <20220101074250.14443-1-a-nandan@ti.com> <20220101074250.14443-6-a-nandan@ti.com> <20220103110107.45594e78@collabora.com> <20220215183705.574df0c1@collabora.com> <12c7a6a6-8b49-1c3e-087f-79c77388b091@ti.com> <20220310094053.1d86d13a@collabora.com> From: Apurva Nandan In-Reply-To: <20220310094053.1d86d13a@collabora.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/03/22 14:10, Boris Brezillon wrote: > On Thu, 10 Mar 2022 13:27:06 +0530 > Apurva Nandan wrote: > >>>>> This way, you can easily pick the right set of operations based >>>>> on the protocol/mode you're in: >>>>> >>>>> #define spinand_get_op_template(spinand, opname) \ >>>>> ((spinand)->op_templates[(spinand)->protocol]->opname) >>>>> >>>>> static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val) >>>>> { >>>>> struct spi_mem_op op = *spinand_get_op_template(spinand, get_feature); >>>>> int ret; >>>>> >>>>> ... >>>>> } >>>> I find a couple of issues with thisĀ  method, >>>> >>>> 1. read_cache, write_cache, update_cache op templates don't fit well >>>> with the other non-data ops, as >>>> these data ops are used to create a dirmap, and that can be done only >>>> once at probe time. Hence, there >>>> is a different mechanism of selecting of data ops and non-data ops. >>> Not sure I see why this is a problem. You can populate data-ops for all >>> modes, and pick the one that provides the best perfs when you create >>> the dirmap (which should really be at the end of the probe, if it's not >>> already). >>> >>>> Hence, this division in the op templates >>>> struct as data_ops and ctrl_ops is required. Currently, the core only >>>> supports using a single protocol for >>>> data ops, chosen at the time of probing. >>> Again, I don't see why you need to differentiate the control and data >>> ops when populating this table. Those are just operations the NAND >>> supports, and the data operations is just a subset. >>> >>>> 2. If we use this single op_templates struct, I can't think of any good >>>> way to initialize these in the >>>> manufacturers driver (winbond.c), refer to 17th patch in this series. >>>> Could you please suggest a macro >>>> implementation also for winbond.c with the suggested op_templates struct. >>> First replace the op_variants field by something more generic: >>> >>> struct spinand_info { >>> ... >>> const struct spinand_op_variants **ops_variants; >>> ... >>> }; >>> >>> #define SPINAND_OP_VARIANTS(_id, ...) \ >>> [SPI_NAND_OP_ ## _id] = { __VA_ARGS__ } >>> >>> #define SPINAND_OPS_VARIANTS(name, ...) >>> const struct spinand_op_variants name[]{ >>> __VA_ARGS__, >>> }; >>> >>> #define SPINAND_INFO_OPS_VARIANTS(defs) >>> .ops_variants = defs >> If we modify these macros, it would require other spinand vendor drivers >> to change (toshiba, micron, etc). >> The older macros suit them well, should we go about changing them to >> this new macro (will require re-testing all of them), >> or can we keep them unchanged and have new set of macros with different >> name (please give suggestion for it) for op variants. > I'd rather have everything converted to the new approach (we don't want > 2 ways of describing the same thing), and I'm not sure you can make the > old macros map to the new solution, so I fear you'll have to patch all > vendors. This being said, I'm fine providing simple wrappers if that > helps, but I don't see how they'd make the description simpler/more > compact to be honest. Okay, I will convert all of the vendor drivers, but please note I don't have any way to test the changes on all the flashes.