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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id u5-20020a170902bf4500b00151b804ff44si3510178pls.308.2022.03.16.22.52.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 22:52:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b="s6h+KJ/a"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 21A7911C2A; Wed, 16 Mar 2022 21:47:34 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357279AbiCPQS4 (ORCPT + 99 others); Wed, 16 Mar 2022 12:18:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356229AbiCPQSz (ORCPT ); Wed, 16 Mar 2022 12:18:55 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E589911A17; Wed, 16 Mar 2022 09:17:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1647447460; x=1678983460; h=from:to:cc:subject:date:message-id:mime-version; bh=AVFaJFntyexxQhyOsQBteV8HyEDV0UX5Izwh1Qofwv4=; b=s6h+KJ/aXp9aAgAR6GDK77MWYnfOwmJ9vK37q/dfslVyi2bSQQoXsf8w J0USc2R8uxzEmI1Knei0t45FH9C12aTdm0lM6gj0tLKclqUcRQIQdY5K1 PuSqVBglNAn7mVwLOkh+Ld+teQgk/+2UXjsEpno0j81NgLdRlHuybTGwX M=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 16 Mar 2022 09:17:40 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Mar 2022 09:17:39 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 16 Mar 2022 09:17:39 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 16 Mar 2022 09:17:33 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , Linus Walleij , CC: Srinivasa Rao Mandadapu Subject: [PATCH v12 0/7] Add pin control support for lpass sc7280 Date: Wed, 16 Mar 2022 21:46:59 +0530 Message-ID: <1647447426-23425-1-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series is to split lpass variant common pin control functions and SoC specific functions and to add lpass sc7280 pincontrol support. It also Adds dt-bindings for lpass sc7280 lpass lpi pincontrol. Changes Since V11: -- Add pinctrl_generic_remove_group in lpass lpi driver. -- Make proper error handling in lpass lpi driver. Changes Since V10: -- Modify driver's custom functions with pin control framework generic functions. -- Update sm8250 and sc7280 pin control depedency list in Kconfig. -- Update commit description of few patches. Changes Since V9: -- Add pinctrl groups macro to Kconfig. Changes Since V8: -- Remove redundant headers included in v8. Changes Since V7: -- Update optional clock voting with conditional check. -- Add const to lpi_pinctrl_variant_data structure. -- Update required headers and remove redundant. -- Change EXPORT_SYMBOL to EXPORT_SYMBOL_GPL -- Fix typo errors. Changes Since V6: -- Update conditional clock voting to optional clock voting. -- Update Kconfig depends on field with select. -- Fix typo errors. Changes Since V5: -- Create new patch by updating macro name to lpi specific. -- Create new patch by updating lpi pin group structure with core group_desc structure. -- Fix typo errors. -- Sort macros in the make file and configuration file. Changes Since V4: -- Update commit message and description of the chip specific extraction patch. -- Sort macros in kconfig and makefile. -- Update optional clock voting to conditional clock voting. -- Fix typo errors. -- Move to quicinc domain email id's. Changes Since V3: -- Update separate Kconfig fields for sm8250 and sc7280. -- Update module license and description. -- Move static variables to corresponding .c files from header file. Changes Since V2: -- Add new dt-bindings for sc7280 lpi driver. -- Make clock voting change as separate patch. -- Split existing pincontrol driver and make common functions as part of separate file. -- Rename lpass pincontrol lpi dt-bindings to sm8250 specific dt-bindings Changes Since V1: -- Make lpi pinctrl variant data structure as constant -- Add appropriate commit message -- Change signedoff by sequence. Srinivasa Rao Mandadapu (7): dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings pinctrl: qcom: Update macro name to LPI specific pinctrl: qcom: Update lpi pin group custiom functions with framework generic functions pinctrl: qcom: Extract chip specific LPASS LPI code pinctrl: qcom: Add SC7280 lpass pin configuration pinctrl: qcom: Update clock voting as optional Tested this on SM8250 MTP with WSA and WCD codecs. Tested-by: Srinivas Kandagatla .../bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml | 133 --------- .../pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 115 ++++++++ .../pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml | 133 +++++++++ drivers/pinctrl/qcom/Kconfig | 19 ++ drivers/pinctrl/qcom/Makefile | 2 + drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 309 +++------------------ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 86 ++++++ drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 168 +++++++++++ drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c | 164 +++++++++++ 9 files changed, 732 insertions(+), 397 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml create mode 100644 drivers/pinctrl/qcom/pinctrl-lpass-lpi.h create mode 100644 drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c -- 2.7.4