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Date:   Tue, 15 Mar 2022 13:32:38 +0200
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Subject: Re: [PATCH] perf intel-pt: Synthesize cycle events
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To:     "Steinar H. Gunderson" <sesse@google.com>
Cc:     Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
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 <ba2c49da-22c5-06ea-e953-82211b953ca8@intel.com>
 <YjBnet2813sEGjZY@google.com>
From:   Adrian Hunter <adrian.hunter@intel.com>
Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki,
 Business Identity Code: 0357606 - 4, Domiciled in Helsinki
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On 15/03/2022 12:16, Steinar H. Gunderson wrote:
> On Mon, Mar 14, 2022 at 06:24:19PM +0200, Adrian Hunter wrote:
>> Perhaps changing it something like below.  What do you think?
> 
> I think the structure looks good, but I'm not sure about updating
> e.g. ptq->last_cy_insn_cnt in both functions? Does that make sense?

It should only be updated in the new intel_pt_synth_cycle_sample().
intel_pt_synth_instruction_sample() should be unchanged.

Also it would be better to keep the IPC count separate from the
sample period. i.e. a third new variable ptq->last_cyc_cnt
which works the same as ptq->last_insn_cnt does for intel_pt_synth_instruction_sample()

diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index c1f261229932..c7a4b5feea2a 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -211,10 +211,13 @@ struct intel_pt_queue {
 	u32 flags;
 	u16 insn_len;
 	u64 last_insn_cnt;
+	u64 last_cyc_cnt;
 	u64 ipc_insn_cnt;
 	u64 ipc_cyc_cnt;
 	u64 last_in_insn_cnt;
 	u64 last_in_cyc_cnt;
+	u64 last_cy_insn_cnt;
+	u64 last_cy_cyc_cnt;
 	u64 last_br_insn_cnt;
 	u64 last_br_cyc_cnt;
 	unsigned int cbr_seen;

Then the new function becomes:

static int intel_pt_synth_cycle_sample(struct intel_pt_queue *ptq)
{
	struct intel_pt *pt = ptq->pt;
	union perf_event *event = ptq->event_buf;
	struct perf_sample sample = { .ip = 0, };
	u64 period;

	if (pt->synth_opts.quick)
		period = 1;
	else
		period = ptq->ipc_cyc_cnt - ptq->last_cyc_cnt;

	if (!period || intel_pt_skip_event(pt))
		return 0;

	intel_pt_prep_sample(pt, ptq, event, &sample);

	sample.id = ptq->pt->cycles_id;
	sample.stream_id = ptq->pt->cycles_id;
	sample.period = period;

	if (ptq->sample_ipc)
		sample.cyc_cnt = ptq->ipc_cyc_cnt - ptq->last_cy_cyc_cnt;
	if (sample.cyc_cnt) {
		sample.insn_cnt = ptq->ipc_insn_cnt - ptq->last_cy_insn_cnt;
		ptq->last_cy_insn_cnt = ptq->ipc_insn_cnt;
		ptq->last_cy_cyc_cnt = ptq->ipc_cyc_cnt;
	}

	ptq->last_cyc_cnt = ptq->ipc_cyc_cnt;

	return intel_pt_deliver_synth_event(pt, event, &sample, pt->cycles_sample_type);
}


> 
> I ran this and found something strange: I've started getting some hits
> (very small amounts, e.g. 0.14%) on instructions that are not branches.
> How can that happen?

Possibly a PSB packet.

If you have an example and recent perf tools you can see the decoder
log as follows:

perf script --itrace=y0nsed+o --time <start time>,<end time> -C <cpu>

where you select <start time>, <end time> and <cpu> to limit the
decoding to that time range and cpu.