Received: by 2002:a05:6a10:413:0:0:0:0 with SMTP id 19csp984966pxp; Wed, 16 Mar 2022 23:30:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwEZsbue9v6MjJEgJialNKu6tubuNIlIn7OyCZkcGSerbxE6WVk2jlbDatz8cRZfujkuNKS X-Received: by 2002:a17:90b:1642:b0:1bf:1dc5:965a with SMTP id il2-20020a17090b164200b001bf1dc5965amr3584723pjb.84.1647498631275; Wed, 16 Mar 2022 23:30:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1647498631; cv=none; d=google.com; s=arc-20160816; b=rseJLYCfu7B3gxhKce++42IUj7/fd3B873XVt0jbr2ApzuyC1NrRWl5eJZmB3Oshat cPnOxG9Ax4MTn59v7Jf3jFsEIN6nLHJ/AOTL8xDw8TW/QGPNmE5j99xa/YTtj/UCOlYj fKYMrzUyq8qz/Hxvdi4K68qpX3rF3R/Zt2MuR3FIcTSf9I3gy+LBJlFiBSNfndjBNan5 sSzBo0BP2uXvllxbDOwjfibxqcZoLjIP1oIWQ5YQ8pXMUFZUdifH/MI+h1YqZ/FBv2tw VlEjyu2g6byIGuyiSg1SbNiIqmq7HenfSSZ31dvAkcSYIUnvpehnHSmJC1AMhDQwwdU1 0hKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=0L2xp+ygSzTUSYY+IP8ARZQgBfBc0cqEyF0ILzaczy8=; b=FpLiTjPAU+USGzOTcrHU702tXLvf+Q8N+E1Zkb7wDElJeWKcjHbR9DorxnOHn+Nk+9 MmoKbermNltBfQGYKJXb5C2GCKcz5OiHr5ZGnOurgEBiX3qA4T+mRw4n5DFjw0e5ASVC hiuqHDCbxjzkiqQ5GqyymuNOMNnk7+Np9KaF0fbuZOpsbjV9lYlWfIgDJT5Tv4IPY2tM Askmq2eS+m6xqHgio9YYiiLuFfR7mlWacUZHuWRVw7i7VyX7Qkj/O4bT00d3fK551muE AOp25nK+R28LzEoh+sH/DCtxqnep+XuBWN6lamdpvcY6EClE2lP8jbrRjRCvSSeQEp4z amuQ== ARC-Authentication-Results: i=1; mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [23.128.96.19]) by mx.google.com with ESMTPS id c10-20020a170902848a00b00153b29e8fc3si3336664plo.312.2022.03.16.23.30.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Mar 2022 23:30:31 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D81DBBC37; Wed, 16 Mar 2022 22:16:01 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346825AbiCOJuj (ORCPT + 99 others); Tue, 15 Mar 2022 05:50:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236295AbiCOJug (ORCPT ); Tue, 15 Mar 2022 05:50:36 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 343121AF24 for ; Tue, 15 Mar 2022 02:49:23 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 25ED01474; Tue, 15 Mar 2022 02:49:23 -0700 (PDT) Received: from bogus (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0BA6D3F66F; Tue, 15 Mar 2022 02:49:21 -0700 (PDT) Date: Tue, 15 Mar 2022 09:49:19 +0000 From: Sudeep Holla To: Leo Yan Cc: Ionela Voinescu , Sudeep Holla , Greg Kroah-Hartman , "Rafael J. Wysocki" , Vincent Guittot , Bryan O'Donoghue , linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 0/3] arch_topology: Correct CPU capacity scaling Message-ID: References: <20220313055512.248571-1-leo.yan@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Leo, On Mon, Mar 14, 2022 at 06:10:58PM +0000, Ionela Voinescu wrote: > Hi Leo, > > On Sunday 13 Mar 2022 at 13:55:09 (+0800), Leo Yan wrote: > > This patch set is to address issues for CPU capacity scaling. > > > > "capacity-dmips-mhz" property might be absent in all CPU nodes, and in > > another situation, DT might have inconsistent binding issue, e.g. some > > CPU nodes have "capacity-dmips-mhz" property and some nodes miss the > > property. Current code mixes these two cases and always rollback to CPU > > capacity 1024 for these two cases. > > Ideally the schema can be made to catch such issues. While I understand that it is work in progress, we can flag the error in the code to handle that. Rollback to 1024 seems correct default behaviour to me. > > Patches 01 and 02 in this set are used to distinguish the two different > > DT binding cases, and for the inconsistent binding issue, it rolls back > > to 1024 without CPU capacity scaling. > > > > Patch 03 is to handle the case for absenting "capacity-dmips-mhz" > > property in CPU nodes, the patch proceeds to do CPU capacity scaling based > > on CPU maximum capacity. Thus it can reflect the correct CPU capacity for > > Arm platforms with "fast" and "slow" clusters (CPUs in two clusters have > > the same raw capacity but with different maximum frequencies). > > NACK for the approach. Just fix the DT. > > In my opinion it's difficult to handle absent "capacity-dmips-mhz" > properties, as they can be a result of 3 scenarios: potential.. > 1. bug in DT > 2. unwillingness to fill this information in DT > 3. suggestion that we're dealing with CPUs with same u-arch > (same capacity-dmips-mhz) > > I'm not sure it's up to us to interpret suggestions in the code so I > believe treating missing information as error is the right choice, which > is how we're handling this now. > +1 for all the points above and are very much valid. > For 3. (and patch 03), isn't it easier to populate capacity-dmips-mhz to > the same value (say 1024) in DT? That is a clear message that we're > dealing with CPUs with the same u-arch. > Indeed. -- Regards, Sudeep