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[209.85.167.49]) by smtp.gmail.com with ESMTPSA id n18-20020a05651203f200b004482d9a014esm574163lfq.174.2022.03.17.16.14.58 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Mar 2022 16:14:59 -0700 (PDT) Received: by mail-lf1-f49.google.com with SMTP id p14so188334lfe.4 for ; Thu, 17 Mar 2022 16:14:58 -0700 (PDT) X-Received: by 2002:ac2:4f92:0:b0:448:7eab:c004 with SMTP id z18-20020ac24f92000000b004487eabc004mr4214994lfs.27.1647558898113; Thu, 17 Mar 2022 16:14:58 -0700 (PDT) MIME-Version: 1.0 References: <20220210223134.233757-1-morbo@google.com> <20220301201903.4113977-1-morbo@google.com> In-Reply-To: From: Linus Torvalds Date: Thu, 17 Mar 2022 16:14:41 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v5] x86: use builtins to read eflags To: Bill Wendling Cc: Nick Desaulniers , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Nathan Chancellor , Juergen Gross , Peter Zijlstra , Andy Lutomirski , llvm@lists.linux.dev, LKML , linux-toolchains Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 17, 2022 at 3:51 PM Linus Torvalds wrote: > > I still think that from a sanity standpoint, it would be good to > actually strengthen the semantics of "asm volatile" to literally act > as - and be ordered with - volatile memory accesses. Side note: the reason I personally would prefer these semantics is that if we had a stronger definition of what "asm volatile" actually means, we could get rid of some - but certainly not all - "memory" clobbers. And while I've been very positive about memory clobbers in this thread - because they give us that serialization we so often need - they can often be bad for code generation. Quite often it's not actually a huge deal. Even with a memory clobber, it's not like the compiler needs to flush any spills or local variables that haven't had their address taken to memory. So quite often a memory clobber is only going to affect instruction ordering a bit, and that's usually exactly what you want. But it certainly _can_ be quite noticeable, and while things like "cli" really wants a memory clobber anyway because it really does want to order with respect to memory accesses that the compiler does, other operations wouldn't necessarily need it. That "native_save_fl()" that does that "pushf ; pop %0" instruction, for example, would be perfectly happy only being ordered wrt other asm instructions (notably ordered wrt cli/sti). So we could easily remove the "memory" clobber there, but only if we had that other ordering constraint of "asm volatile" being ordered wrt each other. Right now we have memory clobbers just about everywhere. It's almost the default, unless it's purely about some purely arithmetic operation. I'm not sure how many of them we could remove, but I do think that pushf/popf is _one_ such case. So stronger semantics for "asm volatile" could potentially help generate better code. Of course, then the "I just don't want you to optimize this away" crowd might be unhappy and find cases where it really hurts. Linus