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From:   "Zhang, Tina" <tina.zhang@intel.com>
To:     David Stevens <stevensd@chromium.org>,
        Lu Baolu <baolu.lu@linux.intel.com>
CC:     "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] iommu/vt-d: check alignment before using psi
Thread-Topic: [PATCH] iommu/vt-d: check alignment before using psi
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Date:   Fri, 18 Mar 2022 06:10:12 +0000
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> -----Original Message-----
> From: iommu <iommu-bounces@lists.linux-foundation.org> On Behalf Of
> David Stevens
> Sent: Wednesday, March 16, 2022 1:07 PM
> To: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org; David
> Stevens <stevensd@chromium.org>
> Subject: [PATCH] iommu/vt-d: check alignment before using psi
>=20
> From: David Stevens <stevensd@chromium.org>
>=20
> Fall back to domain selective flush if the target address is not aligned =
to the
> mask being used for invalidation. This is necessary because page selectiv=
e
> invalidation masks out the lower order bits of the target address based o=
n
> the mask value, so if a non-aligned address is targeted for psi, then map=
pings
> at the end of [pfn, pfn+pages) may not properly be flushed from the iotlb=
.
>=20
> This is not normally an issue because iova.c always allocates iovas that =
are
> aligned to their size. However, iovas which come from other sources (e.g.
> userspace via VFIO) may not be aligned.

Indeed, the dma_map/unmap always use alloca_iova(..., true) to allocate iov=
a, which means size_aligned. But the iova used by userspace might not be si=
ze aligned. And it seems we cannot expect userspace can always use size_ali=
gned iova base address.

BR,
Tina

>=20
> Signed-off-by: David Stevens <stevensd@chromium.org>
> ---
>  drivers/iommu/intel/iommu.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>=20
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 5b196cfe9ed2..c122686e0a5c 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -1735,7 +1735,8 @@ static void iommu_flush_iotlb_psi(struct
> intel_iommu *iommu,
>  		 * and the base address is naturally aligned to the size.
>  		 */
>  		if (!cap_pgsel_inv(iommu->cap) ||
> -		    mask > cap_max_amask_val(iommu->cap))
> +		    mask > cap_max_amask_val(iommu->cap) ||
> +		    unlikely(((1 << mask) - 1) & pfn))
>  			iommu->flush.flush_iotlb(iommu, did, 0, 0,
>=20
> 	DMA_TLB_DSI_FLUSH);
>  		else
> --
> 2.35.1.723.g4982287a31-goog
>=20
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