Received: by 2002:a05:6a10:413:0:0:0:0 with SMTP id 19csp2238845pxp; Fri, 18 Mar 2022 06:30:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwkdoCoyDeR+4IJZd1/UrQYwr1diajKif7X/F6/0pKAUiyOYiT2DHB7WyPuuiaJZmMoz8e0 X-Received: by 2002:a05:6402:5193:b0:416:b3bf:23c3 with SMTP id q19-20020a056402519300b00416b3bf23c3mr9558039edd.163.1647610239852; Fri, 18 Mar 2022 06:30:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1647610239; cv=none; d=google.com; s=arc-20160816; b=yvCdOzKe43yIubuZvQbeXeI8ELy4/fr0cf5fHhMX/X9qujxwIvgQDIsUvOzf4gtWYu cXAs4GcIWyUsp15e4ZgGCgoI6jiNTL7ydgste7BnE6J/f/6J+Fwth/eS2OyylrSiZN+5 dmSOL7s+UXSgnrvDSsaCywSe4dXzPOeebSiIUshljP96I4aXddE+/M48c/lxnvPsXaer FFtW8vAF+57WMxaWjXSeOrMecOoLClt8koiRPcCGUjVIMO3yQzhCcbzEdapdY4QKkANM 6DDehcHNHJ/DHCVHJ2Bg5XVpjpenInEBq3XrRtjZVPAhJ3ibK8YIQ4I0TCGWCqd5WXay MR+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from:sender :hmm_source_type:hmm_attache_num:hmm_source_ip; bh=L9RJTtf01OUzK7Cqp/BAFL8fSMLrSBwCS1fwQQj9GHw=; b=LSLKZPQYfrVDIZk9/zZqRs3vTr3/We35f0ecPJnpn7uNYGkobXUUoA+BUBx6PaGt6v PDq/1ab21/FW3SOD+GcBDHaL23NuL+jUJJqILldyudp/BqKixTuJlcXUvB3lZ5ozfL72 zZ9X73J796um/VvpKKKh2P6Y1WR1Wk+H33EKgmHqFJ6teAsnUqyW9mmoiaO1bl7asTNQ 85e14bXwC03aQGSev1IPwTqVji2jHgjMt5zAeFmyiovL7+r0iAUEYO9gBEFs4t8eTYLT n5SrOMmB+OyQzX2KyeOH1zQeOuqN+Uiyu/aFEVJ5gDO4gBsy4NznidHG+9Lp4BuERAcw d8Zw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s23-20020a50ab17000000b00418fe90d5cfsi2922613edc.576.2022.03.18.06.30.14; Fri, 18 Mar 2022 06:30:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234645AbiCRJw3 (ORCPT + 99 others); Fri, 18 Mar 2022 05:52:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229941AbiCRJw2 (ORCPT ); Fri, 18 Mar 2022 05:52:28 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.104]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5786B178686; Fri, 18 Mar 2022 02:51:09 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.31:36022.1773867350 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-123.150.8.43 (unknown [10.64.8.31]) by 189.cn (HERMES) with SMTP id 2ABC21001B4; Fri, 18 Mar 2022 17:51:06 +0800 (CST) Received: from ([123.150.8.43]) by gateway-153622-dep-749df8664c-cv9r2 with ESMTP id 374a5bf189884f2aa252180a3e8c7832 for johan@kernel.org; Fri, 18 Mar 2022 17:51:08 CST X-Transaction-ID: 374a5bf189884f2aa252180a3e8c7832 X-Real-From: chensong_2000@189.cn X-Receive-IP: 123.150.8.43 X-MEDUSA-Status: 0 Sender: chensong_2000@189.cn From: Song Chen To: johan@kernel.org, elder@kernel.org, gregkh@linuxfoundation.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, lee.jones@linaro.org, greybus-dev@lists.linaro.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, elder@ieee.org, elder@linaro.org Cc: Song Chen Subject: [PATCH v6] staging: greybus: introduce pwm_ops::apply Date: Fri, 18 Mar 2022 17:57:12 +0800 Message-Id: <1647597432-27586-1-git-send-email-chensong_2000@189.cn> X-Mailer: git-send-email 2.7.4 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce newer .apply function in pwm_ops to replace legacy operations including enable, disable, config and set_polarity. This guarantees atomic changes of the pwm controller configuration. Signed-off-by: Song Chen --- v2: 1, define duty_cycle and period as u64 in gb_pwm_config_operation. 2, define duty and period as u64 in gb_pwm_config_request. 3, disable before configuring duty and period if the eventual goal is a disabled state. v3: Regarding duty_cycle and period, I read more discussion in this thread, min, warn or -EINVAL, seems no perfect way acceptable for everyone. How about we limit their value to INT_MAX and throw a warning at the same time when they are wrong? v4: 1, explain why legacy operations are replaced. 2, cap the value of period and duty to U32_MAX. v5: 1, revise commit message. v6: 1, revise commit message. 2, explain why capping the value of period and duty to U32_MAX in comment. --- drivers/staging/greybus/pwm.c | 64 ++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 24 deletions(-) diff --git a/drivers/staging/greybus/pwm.c b/drivers/staging/greybus/pwm.c index 891a6a672378..ad20ec24031e 100644 --- a/drivers/staging/greybus/pwm.c +++ b/drivers/staging/greybus/pwm.c @@ -204,43 +204,59 @@ static void gb_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) gb_pwm_deactivate_operation(pwmc, pwm->hwpwm); } -static int gb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - int duty_ns, int period_ns) +static int gb_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) { + int err; + bool enabled = pwm->state.enabled; + u64 period = state->period; + u64 duty_cycle = state->duty_cycle; struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip); - return gb_pwm_config_operation(pwmc, pwm->hwpwm, duty_ns, period_ns); -}; + /* Set polarity */ + if (state->polarity != pwm->state.polarity) { + if (enabled) { + gb_pwm_disable_operation(pwmc, pwm->hwpwm); + enabled = false; + } + err = gb_pwm_set_polarity_operation(pwmc, pwm->hwpwm, state->polarity); + if (err) + return err; + } -static int gb_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, - enum pwm_polarity polarity) -{ - struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip); + if (!state->enabled) { + if (enabled) + gb_pwm_disable_operation(pwmc, pwm->hwpwm); + return 0; + } - return gb_pwm_set_polarity_operation(pwmc, pwm->hwpwm, polarity); -}; + /* + * Set period and duty cycle + * + * PWM privodes 64-bit period and duty_cycle, but greybus only accepts + * 32-bit, so their values have to be limited to U32_MAX. + */ + if (period > U32_MAX) + period = U32_MAX; -static int gb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip); + if (duty_cycle > period) + duty_cycle = period; - return gb_pwm_enable_operation(pwmc, pwm->hwpwm); -}; + err = gb_pwm_config_operation(pwmc, pwm->hwpwm, duty_cycle, period); + if (err) + return err; -static void gb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct gb_pwm_chip *pwmc = pwm_chip_to_gb_pwm_chip(chip); + /* enable/disable */ + if (!enabled) + return gb_pwm_enable_operation(pwmc, pwm->hwpwm); - gb_pwm_disable_operation(pwmc, pwm->hwpwm); -}; + return 0; +} static const struct pwm_ops gb_pwm_ops = { .request = gb_pwm_request, .free = gb_pwm_free, - .config = gb_pwm_config, - .set_polarity = gb_pwm_set_polarity, - .enable = gb_pwm_enable, - .disable = gb_pwm_disable, + .apply = gb_pwm_apply, .owner = THIS_MODULE, }; -- 2.25.1