Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   "Tian, Kevin" <kevin.tian@intel.com>
To:     David Stevens <stevensd@chromium.org>,
        Lu Baolu <baolu.lu@linux.intel.com>
CC:     "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] iommu/vt-d: check alignment before using psi
Thread-Topic: [PATCH] iommu/vt-d: check alignment before using psi
Thread-Index: AQHYOPPjcTDtc68ZN06cXe2QXXS0/qzE60kw
Date:   Fri, 18 Mar 2022 09:59:18 +0000
Message-ID: <BN9PR11MB5276C9478D22DB9E12CFEF708C139@BN9PR11MB5276.namprd11.prod.outlook.com>
References: <20220316050711.1855533-1-stevensd@google.com>
In-Reply-To: <20220316050711.1855533-1-stevensd@google.com>
Accept-Language: en-US
Content-Language: en-US
x-ms-exchange-antispam-messagedata-chunkcount: 1
x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?mUgIVdTS16qTtMwVxQF4ZU+xhQQ6Tz37rRnJ+yyt/boFWYH+24opwASlhHAp?=
 =?us-ascii?Q?eHAx/Aew+0jpo9Rys6crTFlEOtujLNNDy91vqR3oQyeU7wyfaZwyy3VEeAy4?=
 =?us-ascii?Q?GvGpvZ7XaeVUW88Z+JZsNw3KNclu04ypV7MH+2K0Qh68S7AsGR1OsdiZbvnE?=
 =?us-ascii?Q?IvCT/2vTMb0Bpilnk4n0HTY1HU4RkXclo1U0EnfUUQaACt4K7thtsBea6Gu6?=
 =?us-ascii?Q?5Tj8j9XrThKS+/pCdCAx7AEaeVZxvCKNcuRa25XzVb/5apl9LJf1mo5cdeJu?=
 =?us-ascii?Q?8MotWds6WecYQbOHp0B57vKFc9IjXqmJNYpMd29bXJi4pi17xqJHg3rIYj3X?=
 =?us-ascii?Q?wI+GMhMoj026b3p/VY/Lflbvj3cTs+1y46Zkp3RvUU02MzOInCDTMro2mnca?=
 =?us-ascii?Q?tph/9wo5OwBzA87SVeeT2z5S2zC8DmkJlxCUXKcx966P1v5xD1XFhWzISEg2?=
 =?us-ascii?Q?nOSA4iFVsU9QAjNQqCZRuGXkfNq0dwGQXIi13HuXcGTuGNpriPvLVKlM1oKx?=
 =?us-ascii?Q?5mRTDS4grVZJIaUpNaqHiuquA70sgcVkKIJvKmmVXSN0trmHqLufCJKmvGyP?=
 =?us-ascii?Q?XCDEcEjHCUSHls3PiJdDSJYaqSQwbs5/+12p/fvCyLTzP9eqUxavM/pk7yLk?=
 =?us-ascii?Q?hNpR+novTQohN1nrlBvAbB1H2S3fgHeNrVOK106omR2Fy0/QzNqnaYDTr1Ch?=
 =?us-ascii?Q?480ZvxhoWPhxf88TfCzHSTaY21U83oG+TjDRtJrAD5xBq2sy5scJRfi8TJD1?=
 =?us-ascii?Q?PD+CcYHeVuVXz4kWMhOR1156evtdoIN8o8Syp6gFv7hvG+Ps3xKW6bd2ARU9?=
 =?us-ascii?Q?HZu0AsqCvwXjEFKUeY5ntV/m22LtowdexdzG2HcRODYlys+/DTNsTRHhnvcH?=
 =?us-ascii?Q?UlYcDjf5uNMlZ7I/HxfHjJLcrkGA5KmMRqtop9CiBQlp5AWF3I0mYLDd19/P?=
 =?us-ascii?Q?fq9rogYWsQqoHO5jr3vNvOlyVw7iuTEB5cXNNQDH8EWZP4nX7o6uaWaEUlG6?=
 =?us-ascii?Q?EcMv8l87qyVExEFEaUwzbfvSvVc+V3BRIfSLYWjPaMHoHmphIGhWXhvPcSql?=
 =?us-ascii?Q?UpsK90dB6cZ9jrbYHDXuxobEJHSjHUvFXeHe5SotnlMYd6xnSIWFtpJ9ws/y?=
 =?us-ascii?Q?55WCp/6oDZt7hB4qv+ux1HxdQ1g8LXNumg9dicGdciKovE2b+5JfU7UjLxuw?=
 =?us-ascii?Q?61ACmKctASoWjS01wzJezbPRRqAaWCm5SlY41JuFgxOcE/CIBd9x7hs3sSLv?=
 =?us-ascii?Q?CzRVCrO6JUiwMuZFseySeZbLqbmWJQhtLi4TV+LhdT6Wk11mcG2qgVTiajCn?=
 =?us-ascii?Q?J0cdpOETUJTj6bVoh7DFBl6oacmwtPqClNUq2agd8bFNGDJ9DYP6ftGijFjR?=
 =?us-ascii?Q?3magV5g6pwr7hZ+Bm9eDxz7j68uX4ckN7m9MaD1fkCSDCxaewH+lAD7sH47s?=
 =?us-ascii?Q?eQhHpqYqCITUtfCqewo0Q6Ohst1Z9rSx?=
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: fd2f002d-ef0b-4a9c-b53a-08da08c5f807
X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Mar 2022 09:59:18.8087
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: VHmhMGsM6I9IL7kSzCNoMq/LKZrVKjCKYHjrIDHZ4ps+tREdABnYrhQMiQy8vZsXoQV6WMkwOwBHXLfDvOFxQw==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM8PR11MB5733
X-OriginatorOrg: intel.com
X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,
        DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,
        SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no
        version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

> From: David Stevens <stevensd@chromium.org>
> Sent: Wednesday, March 16, 2022 1:07 PM
>=20
> From: David Stevens <stevensd@chromium.org>
>=20
> Fall back to domain selective flush if the target address is not aligned
> to the mask being used for invalidation. This is necessary because page

using domain selective flush is a bit conservative. What about trying
mask+1 first?

> selective invalidation masks out the lower order bits of the target
> address based on the mask value, so if a non-aligned address is targeted
> for psi, then mappings at the end of [pfn, pfn+pages) may not properly
> be flushed from the iotlb.
>=20
> This is not normally an issue because iova.c always allocates iovas that
> are aligned to their size. However, iovas which come from other sources
> (e.g. userspace via VFIO) may not be aligned.
>=20
> Signed-off-by: David Stevens <stevensd@chromium.org>
> ---
>  drivers/iommu/intel/iommu.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>=20
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 5b196cfe9ed2..c122686e0a5c 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -1735,7 +1735,8 @@ static void iommu_flush_iotlb_psi(struct
> intel_iommu *iommu,
>  		 * and the base address is naturally aligned to the size.
>  		 */
>  		if (!cap_pgsel_inv(iommu->cap) ||
> -		    mask > cap_max_amask_val(iommu->cap))
> +		    mask > cap_max_amask_val(iommu->cap) ||
> +		    unlikely(((1 << mask) - 1) & pfn))
>  			iommu->flush.flush_iotlb(iommu, did, 0, 0,
>=20
> 	DMA_TLB_DSI_FLUSH);
>  		else
> --
> 2.35.1.723.g4982287a31-goog