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Date:   Sat, 19 Mar 2022 15:38:41 +0000
From:   Jonathan Cameron <jic23@kernel.org>
To:     <alexandru.tachici@analog.com>
Cc:     <linux-iio@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/8] iio: adc: ad7124: Remove shift from scan_type
Message-ID: <20220319153841.2483194a@jic23-huawei>
In-Reply-To: <20220318162722.51215-2-alexandru.tachici@analog.com>
References: <20220318162722.51215-1-alexandru.tachici@analog.com>
        <20220318162722.51215-2-alexandru.tachici@analog.com>
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On Fri, 18 Mar 2022 18:27:15 +0200
<alexandru.tachici@analog.com> wrote:

> From: Alexandru Tachici <alexandru.tachici@analog.com>
> 
> The 24 bits data is stored in 32 bits in BE. There
> is no need to shift it. This confuses user-space apps.
> 
> Fixes: b3af341bbd966 ("iio: adc: Add ad7124 support")
> Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
Hi Alexandru,

Just to confirm my understanding (which gets a bit messy when endian
conversions are involved - and it occurs to me that our docs
are not great on how to handle endian conversions with shifts).

With a little endian cpu:
After userspace performs the 32bit big endian to little endian conversion
the value the shift would have previously dropped the bottom 8 bits
of the channel reading?

Looking at what ad_sigma_delta is doing it's documented as
leaving the upper 8 bits as 0 so this would make sense.

Have I understood the issue correctly?

I'll need to hold this one for now as I'll need to rebase the
fixes-togreg branch of iio.git after rc1 is available.

Thanks,

Jonathan


> ---
>  drivers/iio/adc/ad7124.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c
> index 998a342d51a6..7249db2c4422 100644
> --- a/drivers/iio/adc/ad7124.c
> +++ b/drivers/iio/adc/ad7124.c
> @@ -188,7 +188,6 @@ static const struct iio_chan_spec ad7124_channel_template = {
>  		.sign = 'u',
>  		.realbits = 24,
>  		.storagebits = 32,
> -		.shift = 8,
>  		.endianness = IIO_BE,
>  	},
>  };