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From:   Chuanhong Guo <gch981213@gmail.com>
Date:   Sun, 20 Mar 2022 17:19:18 +0800
Message-ID: <CAJsYDVLORFCt75Nv1+3wNd2=mMhHQm6Hb_iQ_HGO=Qgg6iV0eQ@mail.gmail.com>
Subject: Re: [PATCH] mtd: spinand: gigadevice: fix Quad IO for GD5F1GQ5UExxG
To:     linux-mtd@lists.infradead.org
Cc:     Miquel Raynal <miquel.raynal@bootlin.com>,
        Richard Weinberger <richard@nod.at>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Stefan Roese <sr@denx.de>,
        Reto Schneider <reto.schneider@husqvarnagroup.com>,
        Frieder Schrempf <frieder.schrempf@kontron.de>,
        open list <linux-kernel@vger.kernel.org>
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Hi!

On Sat, Mar 19, 2022 at 4:33 PM Chuanhong Guo <gch981213@gmail.com> wrote:
> [...]
> --- a/drivers/mtd/nand/spi/gigadevice.c
> +++ b/drivers/mtd/nand/spi/gigadevice.c
> @@ -39,6 +39,14 @@ static SPINAND_OP_VARIANTS(read_cache_variants_f,
>                 SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0),
>                 SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0));
>
> +static SPINAND_OP_VARIANTS(read_cache_variants_q5,
> +               SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),

I just noticed that only GD5F1GQ5 has 2 dummy bytes. GD5F2GQ5 and
GD5F4GQ6 have 4 dummy bytes instead.
I'll rename this variant to 1gq5 and submit a new version of this with
a series of
patches for other GD SPI NANDs.

-- 
Regards,
Chuanhong Guo