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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id i12-20020a170902eb4c00b001537f2a7197si10913683pli.0.2022.03.21.14.58.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 14:58:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=MjNuB7pQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 233A7716D5; Mon, 21 Mar 2022 14:24:24 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244808AbiCTGah (ORCPT + 99 others); Sun, 20 Mar 2022 02:30:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244803AbiCTGag (ORCPT ); Sun, 20 Mar 2022 02:30:36 -0400 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35D09F1EA5 for ; Sat, 19 Mar 2022 23:29:13 -0700 (PDT) Received: by mail-pf1-x449.google.com with SMTP id w19-20020aa79553000000b004fa64758b82so4547140pfq.22 for ; Sat, 19 Mar 2022 23:29:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:message-id:mime-version:subject:from:to:cc; bh=pTQSsxIlkBPo9ol3laqZr6EZUg9HnSuNMLdKC6CgJnI=; b=MjNuB7pQS36FRtkr5V5HQ/WRzAJjTJaNZlyef+Fh+n7LjwkvvVKkNX/Q6J5fpZVk09 ZYkvHFhKV7oqaOkZaWEcqIpM/1tOx/M89KLU5fnfXHD8PzEJelNL8HKtf7CVJ06sUI/m InDJ/fsiY9s0Xrek4JiYDin4KNtXw07MSlbJNZxH+jH1enMe89LrnSXepc5iDZtznFKo O8YMDy2qTgmf/DXxwpMJIGNRitrksR0aXIimCha31KOmsxQ3pT/8xd/dZl/2UaIg+lmH 9a+zp5ALPKY6YdmelTztpLT8DZD8vSp+wExnojjxWd5Ivoy13ymarFu4zVEVZgTX3PJz QlEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=pTQSsxIlkBPo9ol3laqZr6EZUg9HnSuNMLdKC6CgJnI=; b=cOtio4sNs7mPtTIzHbT9vdUZXaDxb0Uw3ZDhDiwDRC4tFqJYnPsUuELTm5LEjk24Pu 86fUEqwg0UDv6PyxIE6MO2EE3dLwWkEcQq+1DWMAtkehx84S4EHoCZBUZISN4q0Vil2Q 3Jxgqxz7HFnHi/ZefdYpZNLc6bU1ptRUq/toDfit7rs1Oel9PJvCL+u8oD0eOADQdymZ j1hLsvT3vfO9bq+f9rESSDAo6P7tU+gz65B79OktwY7fdRG60fd8bmhH0GXvsYu15vPU ae9KGIzGsmuzguaKeoNxSsMwdzURghUG38ajPESD8qdGeAUxT6NdktWQOCOJkZDmp0oU luJw== X-Gm-Message-State: AOAM533kWTtllZGM4nfnbOsp8pM9gxT1KhAX23fN0w67OlScfN4Ldky7 Fh/9NyQy7g2Yd/Iz1wFR9DsjbB3mSf9b X-Received: from rajat2.mtv.corp.google.com ([2620:15c:202:201:5445:bc31:4f4a:d610]) (user=rajatja job=sendgmr) by 2002:a17:90a:8b91:b0:1be:db25:eecd with SMTP id z17-20020a17090a8b9100b001bedb25eecdmr19986137pjn.10.1647757752500; Sat, 19 Mar 2022 23:29:12 -0700 (PDT) Date: Sat, 19 Mar 2022 23:29:05 -0700 Message-Id: <20220320062907.3272903-1-rajatja@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.35.1.894.gb6a874cedc-goog Subject: [PATCH v4 1/2] PCI: Rename "pci_dev->untrusted" to "pci_dev->poses_dma_risk" From: Rajat Jain To: "Rafael J. Wysocki" , Len Brown , linux-pci@vger.kernel.org, Mika Westerberg , Greg Kroah-Hartman , Bjorn Helgaas , Bjorn Helgaas , ACPI Devel Maling List , Linux Kernel Mailing List , Rajat Jain , Dmitry Torokhov , Jesse Barnes , Jean-Philippe Brucker , Pavel Machek , "Oliver O'Halloran" , Joerg Roedel , Will Deacon , David Woodhouse , Lu Baolu , iommu@lists.linux-foundation.org Cc: Rajat Jain Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-9.5 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE, USER_IN_DEF_DKIM_WL autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename the field to make it more clear, that the device can execute DMA attacks on the system, and thus the system may need protection from such attacks from this device. No functional change intended. Signed-off-by: Rajat Jain --- v4: Initial version, created based on comments on other patch drivers/iommu/dma-iommu.c | 6 +++--- drivers/iommu/intel/iommu.c | 2 +- drivers/iommu/iommu.c | 2 +- drivers/pci/ats.c | 2 +- drivers/pci/pci.c | 2 +- drivers/pci/probe.c | 8 ++++---- drivers/pci/quirks.c | 2 +- include/linux/pci.h | 5 +++-- 8 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index d85d54f2b549..ce10bfa86cf7 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -497,14 +497,14 @@ static int iova_reserve_iommu_regions(struct device *dev, return ret; } -static bool dev_is_untrusted(struct device *dev) +static bool dev_poses_dma_risk(struct device *dev) { - return dev_is_pci(dev) && to_pci_dev(dev)->untrusted; + return dev_is_pci(dev) && to_pci_dev(dev)->poses_dma_risk; } static bool dev_use_swiotlb(struct device *dev) { - return IS_ENABLED(CONFIG_SWIOTLB) && dev_is_untrusted(dev); + return IS_ENABLED(CONFIG_SWIOTLB) && dev_poses_dma_risk(dev); } /** diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 92fea3fbbb11..2e963a153c71 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -5570,7 +5570,7 @@ intel_iommu_enable_nesting(struct iommu_domain *domain) */ static bool risky_device(struct pci_dev *pdev) { - if (pdev->untrusted) { + if (pdev->poses_dma_risk) { pci_info(pdev, "Skipping IOMMU quirk for dev [%04X:%04X] on untrusted PCI link\n", pdev->vendor, pdev->device); diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 8b86406b7162..81433aab0245 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1522,7 +1522,7 @@ static int iommu_get_def_domain_type(struct device *dev) { const struct iommu_ops *ops = dev->bus->iommu_ops; - if (dev_is_pci(dev) && to_pci_dev(dev)->untrusted) + if (dev_is_pci(dev) && to_pci_dev(dev)->poses_dma_risk) return IOMMU_DOMAIN_DMA; if (ops->def_domain_type) diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index c967ad6e2626..6390fbeaaa02 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c @@ -42,7 +42,7 @@ bool pci_ats_supported(struct pci_dev *dev) if (!dev->ats_cap) return false; - return (dev->untrusted == 0); + return (dev->poses_dma_risk == 0); } EXPORT_SYMBOL_GPL(pci_ats_supported); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 9ecce435fb3f..526d26f2011b 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -958,7 +958,7 @@ static void pci_std_enable_acs(struct pci_dev *dev) ctrl |= (cap & PCI_ACS_UF); /* Enable Translation Blocking for external devices and noats */ - if (pci_ats_disabled() || dev->external_facing || dev->untrusted) + if (pci_ats_disabled() || dev->external_facing || dev->poses_dma_risk) ctrl |= (cap & PCI_ACS_TB); pci_write_config_word(dev, pos + PCI_ACS_CTRL, ctrl); diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 17a969942d37..7ae1ed312c47 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1587,7 +1587,7 @@ static void set_pcie_thunderbolt(struct pci_dev *dev) dev->is_thunderbolt = 1; } -static void set_pcie_untrusted(struct pci_dev *dev) +static void pci_check_if_dev_poses_dma_risk(struct pci_dev *dev) { struct pci_dev *parent; @@ -1596,8 +1596,8 @@ static void set_pcie_untrusted(struct pci_dev *dev) * untrusted as well. */ parent = pci_upstream_bridge(dev); - if (parent && (parent->untrusted || parent->external_facing)) - dev->untrusted = true; + if (parent && (parent->poses_dma_risk || parent->external_facing)) + dev->poses_dma_risk = true; } static void pci_set_removable(struct pci_dev *dev) @@ -1862,7 +1862,7 @@ int pci_setup_device(struct pci_dev *dev) /* Need to have dev->cfg_size ready */ set_pcie_thunderbolt(dev); - set_pcie_untrusted(dev); + pci_check_if_dev_poses_dma_risk(dev); /* "Unknown power state" */ dev->current_state = PCI_UNKNOWN; diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index d2dd6a6cda60..5c601c6c30bf 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5122,7 +5122,7 @@ static int pci_quirk_enable_intel_spt_pch_acs(struct pci_dev *dev) ctrl |= (cap & PCI_ACS_CR); ctrl |= (cap & PCI_ACS_UF); - if (pci_ats_disabled() || dev->external_facing || dev->untrusted) + if (pci_ats_disabled() || dev->external_facing || dev->poses_dma_risk) ctrl |= (cap & PCI_ACS_TB); pci_write_config_dword(dev, pos + INTEL_SPT_ACS_CTRL, ctrl); diff --git a/include/linux/pci.h b/include/linux/pci.h index 678fecdf6b81..75547fd5587c 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -444,13 +444,14 @@ struct pci_dev { unsigned int shpc_managed:1; /* SHPC owned by shpchp */ unsigned int is_thunderbolt:1; /* Thunderbolt controller */ /* - * Devices marked being untrusted are the ones that can potentially + * Devices marked with "poses_dma_risk" can potentially * execute DMA attacks and similar. They are typically connected * through external ports such as Thunderbolt but not limited to * that. When an IOMMU is enabled they should be getting full * mappings to make sure they cannot access arbitrary memory. */ - unsigned int untrusted:1; + unsigned int poses_dma_risk:1; + /* * Info from the platform, e.g., ACPI or device tree, may mark a * device as "external-facing". An external-facing device is -- 2.35.1.894.gb6a874cedc-goog