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Subject: Re: [Patch v1 2/3] arm64: tegra: add node for tegra234 cpufreq
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To:     Jon Hunter <jonathanh@nvidia.com>, <rafael@kernel.org>,
        <viresh.kumar@linaro.org>, <robh+dt@kernel.org>,
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        "Sumit Gupta" <sumitg@nvidia.com>
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From:   Sumit Gupta <sumitg@nvidia.com>
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>> Adding cclpex node to represent Tegra234 cpufreq.
>> Tegra234 uses some of the CRAB (Control Register Access Bus)
>> registers for cpu frequency requests. These registers are
>> memory mapped to CCPLEX_MMCRAB_ARM region. In this node, mapping
>> the range of MMCRAB registers required only for cpu frequency info.
>>
>> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
>> ---
>>   arch/arm64/boot/dts/nvidia/tegra234.dtsi | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi 
>> b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> index aaace605bdaa..610207f3f967 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> @@ -1258,6 +1258,13 @@
>>           };
>>       };
>> +    ccplex@e000000 {
>> +        compatible = "nvidia,tegra234-ccplex-cluster";
>> +        reg = <0x0 0x0e000000 0x0 0x5ffff>;
>> +        nvidia,bpmp = <&bpmp>;
>> +        status = "okay";
>> +    };
>> +
>>       sram@40000000 {
>>           compatible = "nvidia,tegra234-sysram", "mmio-sram";
>>           reg = <0x0 0x40000000 0x0 0x80000>;
> 
> 
> We need to add this compatible string to a DT binding doc somewhere.
It seems the binding doc was previously posted in [1] for T186 SoC.
Same will be applicable for T234 SoC also. Only compatible string need 
to be added.
Should I sent a separate patch after converting it to yaml format and 
add compatible string (or) send as part of v2.

[1] https://lkml.org/lkml/2017/4/3/324

> 
> Cheers
> Jon
>