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Message-ID: <ff7ac17b-06ba-cf56-dca2-94c4ccca5df8@intel.com>
Date:   Mon, 21 Mar 2022 19:40:33 +0200
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Subject: Re: [PATCH] perf intel-pt: Synthesize cycle events
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To:     "Steinar H. Gunderson" <sesse@google.com>
Cc:     Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
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From:   Adrian Hunter <adrian.hunter@intel.com>
Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki,
 Business Identity Code: 0357606 - 4, Domiciled in Helsinki
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On 21/03/2022 18:58, Steinar H. Gunderson wrote:
> On Mon, Mar 21, 2022 at 03:09:08PM +0200, Adrian Hunter wrote:
>> Yes, it can cross calls and returns.  'returns' due to "Return Compression"
>> which can be switched off at record time with config term noretcomp, but
>> that may cause more overflows / trace data loss.
>>
>> To get accurate times for a single function there is Intel PT
>> address filtering.
>>
>> Otherwise LBRs can have cycle times.
> 
> Many interesting points, I'll be sure to look into them.
> 
> Meanwhile, should I send a new patch with your latest changes?

Yes please.