Received: by 2002:a05:6a10:413:0:0:0:0 with SMTP id 19csp3252757pxp; Tue, 22 Mar 2022 15:39:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwiNmtK5U2EyOTofQkL8Nc9aJ2Lf38NGHw5bj31j0ld/+pKgUSlkWYJVMdvA55UTIZqYeVL X-Received: by 2002:a17:90a:1b6e:b0:1c6:168e:11e7 with SMTP id q101-20020a17090a1b6e00b001c6168e11e7mr7624478pjq.136.1647988792315; Tue, 22 Mar 2022 15:39:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1647988792; cv=none; d=google.com; s=arc-20160816; b=wJ+pkrKs1UHbBy8vtY0j6eARWsU8WLhE8nNuDE2ES0ymOOEpbpaVbcg56hguh+OHqR 3L1Av02O7lUyb38jGzwXwMQeyVTVe1iAI3I84ZGfDUPVYK5yKdb8SChBA4N5GRoa8yEk 7QTu7JBRHu47QDcz/YgnKgF1zZ9I08sySgP4TdgwwlsC1kIOYHzF7EKmV5MzZnBTPFFH n00NFSOibaJ5H6hWMi/Sc7NM9tQIuvF92qZ0n9mdwrL7isJnvB/Oc2xBLlyDRQnOsIuv nz/8ud+ijZ0OSoCXJ7gOaoFGb5zIVMjF0Q+QccLL9rd9jHZOJxPgZfOm79gEmmW2/bFb Y2XA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ddJfGZI/scN6mRC0h2W5QEUJscVe7Kzx37aqg8MLuNA=; b=pmUmc8qwfEH/4NuD2YUK1DC231S0p/6GzjozBFVTpJZrp3cQA1+QmaNYWaUTqcxwHo HnP8fgD9BAPHUBXfowtMfA8N2nWJFXGgGge0wEcvzGm9PP++3F4ryCEmK7fIkRUEmX5A lFnlgrT9CKJx7BttbArbjQzF24h6pr2fe858s/C22aJAF6ub1aAWjxYOv7ofBnP8J/Gl HeEfMoBF6tEeFOqRGmDJzLvpvB6BRhFplj6qnt87rHiHe33j7aDIe7BIGskM4V8Kfhhm i4mypC/DXDt8Pdt/Lw1hxisvSdwgmVQGmN+gLfY8aSh27ht+304NFw9lIV269Tau/UR6 YcQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=agV21sKb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e18-20020a170902ed9200b00153b2d16577si15121273plj.383.2022.03.22.15.39.36; Tue, 22 Mar 2022 15:39:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=agV21sKb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232906AbiCVPUa (ORCPT + 99 others); Tue, 22 Mar 2022 11:20:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237034AbiCVPUW (ORCPT ); Tue, 22 Mar 2022 11:20:22 -0400 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE5FF5B3DE; Tue, 22 Mar 2022 08:18:54 -0700 (PDT) Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22MCnUfK013136; Tue, 22 Mar 2022 10:18:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=ddJfGZI/scN6mRC0h2W5QEUJscVe7Kzx37aqg8MLuNA=; b=agV21sKbQO+mnnF/IDqn6DXrzShVnUSZGy6oqMQTLscKyKqfybA3P4FyDYeC5g/9/OG4 sOEXmMWQ1HJUAEYRjuL6IsbC2Bw6aR1Oj2Oyqga9S6PayIOdwFhl0QdFjuLUQOi9LFsF 61YdS5WBUmue3Y8ceFMnvnYkI7eEqFq5POIUvNQsQYH3lbvBOP5qmkAqalDX3iD38aml LYs8Uo8+wDuhAYy/ufrWvXxcYzAbILazXKNRjvFs0GfjVYEquU6PPAkdCBNTKXI+/XYI xBtAYVeTj6L+T4GIaz1aEZNWkl0/LE1Di4bp2Rgeg1krY13/DDZhoHC5yq0dXLWjwteL Vw== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 3ewbknc0jc-13 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 22 Mar 2022 10:18:46 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Tue, 22 Mar 2022 15:18:36 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.18 via Frontend Transport; Tue, 22 Mar 2022 15:18:36 +0000 Received: from aryzen.ad.cirrus.com (unknown [198.61.65.125]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 371F3B1A; Tue, 22 Mar 2022 15:18:36 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure , Charles Keepax Subject: [PATCH v5 16/16] ASoC: cs35l41: Support external boost Date: Tue, 22 Mar 2022 15:18:19 +0000 Message-ID: <20220322151819.4299-17-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220322151819.4299-1-tanureal@opensource.cirrus.com> References: <20220322151819.4299-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 7qj2pbFDKuMEJ4kwlvpuFjVyGqelGceF X-Proofpoint-GUID: 7qj2pbFDKuMEJ4kwlvpuFjVyGqelGceF X-Proofpoint-Spam-Reason: safe X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for external boost voltage, where GPIO1 must control a switch to isolate CS35L41 from the external Boost Voltage Signed-off-by: Lucas Tanure Acked-by: Charles Keepax --- include/sound/cs35l41.h | 4 +-- sound/soc/codecs/cs35l41-lib.c | 5 ++-- sound/soc/codecs/cs35l41.c | 49 +++++++++++++++++++++++++--------- 3 files changed, 41 insertions(+), 17 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index ac629f852f2a..dbe8d9c0191b 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -701,6 +701,8 @@ #define CS35L41_GPIO1_CTRL_SHIFT 16 #define CS35L41_GPIO2_CTRL_MASK 0x07000000 #define CS35L41_GPIO2_CTRL_SHIFT 24 +#define CS35L41_GPIO_LVL_SHIFT 15 +#define CS35L41_GPIO_LVL_MASK BIT(CS35L41_GPIO_LVL_SHIFT) #define CS35L41_GPIO_POL_MASK 0x1000 #define CS35L41_GPIO_POL_SHIFT 12 @@ -802,8 +804,6 @@ int cs35l41_register_errata_patch(struct device *dev, struct regmap *reg, unsign int cs35l41_set_channels(struct device *dev, struct regmap *reg, unsigned int tx_num, unsigned int *tx_slot, unsigned int rx_num, unsigned int *rx_slot); -int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, int boost_cap, - int boost_ipk); int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg); int cs35l41_init_boost(struct device *dev, struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg); diff --git a/sound/soc/codecs/cs35l41-lib.c b/sound/soc/codecs/cs35l41-lib.c index 2d3b577a63e3..491616c7c5c7 100644 --- a/sound/soc/codecs/cs35l41-lib.c +++ b/sound/soc/codecs/cs35l41-lib.c @@ -954,8 +954,8 @@ static const unsigned char cs35l41_bst_slope_table[4] = { 0x75, 0x6B, 0x3B, 0x28 }; -int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, - int boost_cap, int boost_ipk) +static int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, + int boost_cap, int boost_ipk) { unsigned char bst_lbst_val, bst_cbst_range, bst_ipk_scaled; int ret; @@ -1040,7 +1040,6 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in return 0; } -EXPORT_SYMBOL_GPL(cs35l41_boost_config); static const struct reg_sequence cs35l41_safe_to_reset[] = { { 0x00000040, 0x00000055 }, diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c index d25689fe0c60..912196f45648 100644 --- a/sound/soc/codecs/cs35l41.c +++ b/sound/soc/codecs/cs35l41.c @@ -578,15 +578,10 @@ static int cs35l41_main_amp_event(struct snd_soc_dapm_widget *w, cs35l41_pup_patch, ARRAY_SIZE(cs35l41_pup_patch)); - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL1, - CS35L41_GLOBAL_EN_MASK, - 1 << CS35L41_GLOBAL_EN_SHIFT); - - usleep_range(1000, 1100); + cs35l41_global_enable(cs35l41->regmap, cs35l41->hw_cfg.bst_type, 1); break; case SND_SOC_DAPM_POST_PMD: - regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL1, - CS35L41_GLOBAL_EN_MASK, 0); + cs35l41_global_enable(cs35l41->regmap, cs35l41->hw_cfg.bst_type, 0); ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS1, val, val & CS35L41_PDN_DONE_MASK, @@ -1001,13 +996,13 @@ static int cs35l41_set_pdata(struct cs35l41_private *cs35l41) if (!hw_cfg->valid) return -EINVAL; + if (hw_cfg->bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) + return -EINVAL; + /* Required */ - ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, - hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); - if (ret) { - dev_err(cs35l41->dev, "Error in Boost DT config: %d\n", ret); + ret = cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, hw_cfg); + if (ret) return ret; - } /* Optional */ if (hw_cfg->dout_hiz <= CS35L41_ASP_DOUT_HIZ_MASK && hw_cfg->dout_hiz >= 0) @@ -1017,9 +1012,31 @@ static int cs35l41_set_pdata(struct cs35l41_private *cs35l41) return 0; } +static const struct snd_soc_dapm_route cs35l41_ext_bst_routes[] = { + {"Main AMP", NULL, "VSPK"}, +}; + +static const struct snd_soc_dapm_widget cs35l41_ext_bst_widget[] = { + SND_SOC_DAPM_SUPPLY("VSPK", CS35L41_GPIO1_CTRL1, CS35L41_GPIO_LVL_SHIFT, 0, NULL, 0), +}; + static int cs35l41_component_probe(struct snd_soc_component *component) { struct cs35l41_private *cs35l41 = snd_soc_component_get_drvdata(component); + struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); + int ret; + + if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) { + ret = snd_soc_dapm_new_controls(dapm, cs35l41_ext_bst_widget, + ARRAY_SIZE(cs35l41_ext_bst_widget)); + if (ret) + return ret; + + ret = snd_soc_dapm_add_routes(dapm, cs35l41_ext_bst_routes, + ARRAY_SIZE(cs35l41_ext_bst_routes)); + if (ret) + return ret; + } return wm_adsp2_component_probe(&cs35l41->dsp, component); } @@ -1084,6 +1101,10 @@ static int cs35l41_handle_pdata(struct device *dev, struct cs35l41_hw_cfg *hw_cf unsigned int val; int ret; + ret = device_property_read_u32(dev, "cirrus,boost-type", &val); + if (ret >= 0) + hw_cfg->bst_type = val; + ret = device_property_read_u32(dev, "cirrus,boost-peak-milliamp", &val); if (ret >= 0) hw_cfg->bst_ipk = val; @@ -1376,6 +1397,7 @@ int cs35l41_probe(struct cs35l41_private *cs35l41, const struct cs35l41_hw_cfg * wm_adsp2_remove(&cs35l41->dsp); err: + cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); regulator_bulk_disable(CS35L41_NUM_SUPPLIES, cs35l41->supplies); gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); @@ -1390,6 +1412,7 @@ void cs35l41_remove(struct cs35l41_private *cs35l41) regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1, 0xFFFFFFFF); wm_adsp2_remove(&cs35l41->dsp); + cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); pm_runtime_put_noidle(cs35l41->dev); @@ -1409,6 +1432,7 @@ static int __maybe_unused cs35l41_runtime_suspend(struct device *dev) dev_dbg(cs35l41->dev, "Enter hibernate\n"); + cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); regmap_write(cs35l41->regmap, CS35L41_WAKESRC_CTL, 0x0088); regmap_write(cs35l41->regmap, CS35L41_WAKESRC_CTL, 0x0188); @@ -1505,6 +1529,7 @@ static int __maybe_unused cs35l41_runtime_resume(struct device *dev) dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret); return ret; } + cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg); return 0; } -- 2.35.1