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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ca11-20020a056a00418b00b004fa843103dbsi5027500pfb.193.2022.03.22.19.28.19; Tue, 22 Mar 2022 19:28:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=jhnIhhmg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233964AbiCVPVf (ORCPT + 99 others); Tue, 22 Mar 2022 11:21:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238428AbiCVPU0 (ORCPT ); Tue, 22 Mar 2022 11:20:26 -0400 Received: from mx0b-001ae601.pphosted.com (mx0a-001ae601.pphosted.com [67.231.149.25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F1165C36E; Tue, 22 Mar 2022 08:18:58 -0700 (PDT) Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22MAwx9A011964; Tue, 22 Mar 2022 10:18:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=+0x79oIRY35Ch40WhjnDVCWyYz7xwNE/6qRLOJjSwpE=; b=jhnIhhmgqUK/TsLg+9JeupoWoUmQofhuoPuieVV8EcAEETB2utamxbLcHk1SIqInDYpH DmMt//jKQx0YhQr/LKWjypwk3wjmW1lpuKSrrLheumhfeMod/Z9wpjRzYo/uV+eL5wa0 PGRbDLyMG1UDwTukmhq47RPlCFE73uwStvWZID2m+TJNMTRNlLXGUzc/bdamaz1eghZg TKvhHOheS0lhgIgeBhMlHu+/B1OgSdAlzjpCSx/D67TQmcH0QFY8V+0EjnJ/la6FItSy 4vebF+VuUGHzMPMLDbvZAUT2LCTvY3WKE0C9zoLb4XY7rTOPEh88J98Msk6AD+MGwFyo VQ== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0a-001ae601.pphosted.com (PPS) with ESMTPS id 3ewck1cb46-4 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 22 Mar 2022 10:18:35 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Tue, 22 Mar 2022 15:18:33 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.18 via Frontend Transport; Tue, 22 Mar 2022 15:18:33 +0000 Received: from aryzen.ad.cirrus.com (unknown [198.61.65.125]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id C98E1B1A; Tue, 22 Mar 2022 15:18:32 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v5 06/16] ALSA: hda: cs35l41: Add Boost type flag Date: Tue, 22 Mar 2022 15:18:09 +0000 Message-ID: <20220322151819.4299-7-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220322151819.4299-1-tanureal@opensource.cirrus.com> References: <20220322151819.4299-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: -FuxyHnUgLyNTf18EBnkfhEwCkq9L-cU X-Proofpoint-GUID: -FuxyHnUgLyNTf18EBnkfhEwCkq9L-cU X-Proofpoint-Spam-Reason: safe X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace vspk_always_on by a enum that better characterizes the boost type, as there is 3 types of boost hardware. And with the new boost type other parts of the driver can better handle the configuration of the chip. Signed-off-by: Lucas Tanure --- include/sound/cs35l41.h | 9 ++++++-- sound/pci/hda/cs35l41_hda.c | 43 +++++++++++++++++++++---------------- 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index e312eb1f6e48..64d98cbd5c0e 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -725,6 +725,12 @@ #define CS35L41_SPI_MAX_FREQ 4000000 #define CS35L41_REGSTRIDE 4 +enum cs35l41_boost_type { + CS35L41_INT_BOOST, + CS35L41_EXT_BOOST, + CS35L41_EXT_BOOST_NO_VSPK_SWITCH, +}; + enum cs35l41_clk_ids { CS35L41_CLKID_SCLK = 0, CS35L41_CLKID_LRCLK = 1, @@ -768,8 +774,7 @@ struct cs35l41_hw_cfg { struct cs35l41_gpio_cfg gpio2; unsigned int spk_pos; - /* Don't put the AMP in reset if VSPK can not be turned off */ - bool vspk_always_on; + enum cs35l41_boost_type bst_type; }; struct cs35l41_otp_packed_element_t { diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index f853530eb385..0dac622805c4 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -210,20 +210,30 @@ static const struct component_ops cs35l41_hda_comp_ops = { static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) { struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; - bool internal_boost = false; int ret; if (!cs35l41->hw_cfg.valid) return -EINVAL; - if (hw_cfg->vspk_always_on) { + switch (hw_cfg->bst_type) { + case CS35L41_INT_BOOST: + cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; + ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, + hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); + if (ret) + return ret; + break; + case CS35L41_EXT_BOOST: + cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; + break; + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; - return 0; + break; + default: + dev_err(cs35l41->dev, "Boost type %d not supported\n", hw_cfg->bst_type); + return -EINVAL; } - if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) - internal_boost = true; - if (hw_cfg->gpio1.valid) { switch (hw_cfg->gpio1.func) { case CS35L41_NOT_USED: @@ -256,16 +266,6 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) cs35l41_gpio_config(cs35l41->regmap, hw_cfg); - if (internal_boost) { - cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; - ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, - hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); - if (ret) - return ret; - } else { - cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; - } - return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos); } @@ -363,6 +363,11 @@ static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, i else hw_cfg->bst_cap = -1; + if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) + hw_cfg->bst_type = CS35L41_INT_BOOST; + else + hw_cfg->bst_type = CS35L41_EXT_BOOST; + hw_cfg->valid = true; put_device(physdev); @@ -388,7 +393,7 @@ static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, i /* check I2C address to assign the index */ cs35l41->index = id == 0x40 ? 0 : 1; cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); - cs35l41->hw_cfg.vspk_always_on = true; + cs35l41->hw_cfg.bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH; cs35l41->hw_cfg.valid = true; put_device(physdev); @@ -515,7 +520,7 @@ int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int i return 0; err: - if (!cs35l41->hw_cfg.vspk_always_on) + if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); @@ -529,7 +534,7 @@ void cs35l41_hda_remove(struct device *dev) component_del(cs35l41->dev, &cs35l41_hda_comp_ops); - if (!cs35l41->hw_cfg.vspk_always_on) + if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); } -- 2.35.1