Received: by 2002:a05:6a10:413:0:0:0:0 with SMTP id 19csp3430408pxp; Tue, 22 Mar 2022 20:41:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxdRotImxwLzEGwKFo+/B2uCwyKteaQmFBPbJthVFsNBKGe6WEmyIIl6/Na1dbxGrDDEN70 X-Received: by 2002:a17:902:7088:b0:153:10ec:c5ef with SMTP id z8-20020a170902708800b0015310ecc5efmr21533831plk.18.1648006905701; Tue, 22 Mar 2022 20:41:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1648006905; cv=none; d=google.com; s=arc-20160816; b=KRuGAw9JJ55aTqQZEqiY7lvn6Q4wzPLp4JQNUUtlDKaxJjcCzUO++dg52/MXbxmIYv k7lVqERzPnWO641I8LUfmvU0iOrFOhWMk6iyx74AUxMGdqY62I0yEbJ9S5grLcEpDpv7 yMmxrvL/8MrFXgRl3do1SmAf4typo1I5vZ/n/cl+Iz9ujfzhKOhPB80UgWwtPspJsTxD 2L2pn9V+pSDu9R5KPsftJMAelubn+bMIuAHwN/oQBMEAXneLDKN0qdpHv+wHE8IobavQ ShswEMh4Nt+5dYdRHwm3EB6xB5eUoug+4X4KrEB5Ey5ysqmqGAY9HolVzH01SAwxUizw Bi1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=of9QB3tmkL0oOWKdhTGtzmf3Ml8UuecLfoNp3KwvfIM=; b=urvbyEmm9wp8LXQkb8JLr+33utjD9/dmzBqdIlY0diCNW7zyHNT5zGj0bo5gD/jhHu ROQiFzi+NG9VORHYKrPn56dxUuMccUasc6kMPTWlMK4rzCXjxhMcX8uhqdtWqJZ4ndFJ DT6MM7BaLR8TGlAGrq/6K4L3i6GSXFUgLC7CphvHtrIv4VptL0BHScBzhyQmf24ZdTtl BXj0TCThprfDPmfpcvj1hJwAX1UCGreaXP9lw02+z4dGk4L3b/bCHVZrRFTi6WaH/yCJ W2Ufzbvt6uw1CpjvmA0sqrXB2u9YCtNSfOuD9kWDhy9XK5u6zFncgWVgBDR8IKr5dHT/ +XLQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=R6EfgCNg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id io9-20020a17090312c900b00153b2d16409si16299596plb.17.2022.03.22.20.41.31; Tue, 22 Mar 2022 20:41:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=R6EfgCNg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233619AbiCVPVW (ORCPT + 99 others); Tue, 22 Mar 2022 11:21:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238418AbiCVPUZ (ORCPT ); Tue, 22 Mar 2022 11:20:25 -0400 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2BD45BD07; Tue, 22 Mar 2022 08:18:57 -0700 (PDT) Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22MCnUfH013136; Tue, 22 Mar 2022 10:18:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=of9QB3tmkL0oOWKdhTGtzmf3Ml8UuecLfoNp3KwvfIM=; b=R6EfgCNgPXGRfrXx17Ba2QnDlwKWg/c6BhmFmbpgxeJ8ESW/2vim0UgLkn+cPQZanhGd BXGRSThtOr5ofF6RY/WoDxzMy0I0azmvTKpCWssO714J+ZU1FMoxq7m9M9BKErOVTYaz 479/bxwb7Rj65t5Yl8GjD6V1Jse8L91REmtBZqpbbuKzC2Agj0/nIfnIhNKE3HgYz/q0 wRi5VdrGB40Evp/6oq4tBy+KWSEErTPMzQy3Ai/DYimIaTr9d6Um65a0SglvfNvEMCB7 ly33qSvGBs1aRDKZro3f78sv8XuOELUMgSfn6jPNna4Ii6W8I115W1dBixNXDkEfZ2aa MA== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 3ewbknc0jc-10 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 22 Mar 2022 10:18:43 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Tue, 22 Mar 2022 15:18:35 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.18 via Frontend Transport; Tue, 22 Mar 2022 15:18:35 +0000 Received: from aryzen.ad.cirrus.com (unknown [198.61.65.125]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 2DB44B1A; Tue, 22 Mar 2022 15:18:35 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v5 13/16] ALSA: hda: cs35l41: Handle all external boost setups the same way Date: Tue, 22 Mar 2022 15:18:16 +0000 Message-ID: <20220322151819.4299-14-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220322151819.4299-1-tanureal@opensource.cirrus.com> References: <20220322151819.4299-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 7XVvfU0-0duuGkRadj7JBhJnx31tx6y5 X-Proofpoint-GUID: 7XVvfU0-0duuGkRadj7JBhJnx31tx6y5 X-Proofpoint-Spam-Reason: safe X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org External boost enables sequences for devices with or without GPIO1 as VSPK switch are the same if devices are put in safe mode from reset. As a previous patch put all external boost devices into safe mode from reset, all external boost devices can be handled in the same way for stream open and close. The only difference is that devices without an VSPK switch can not be put in reset and devices with it can be put into reset if a configuration is applied. The function cs35l41_hda_safe_reset is created to handle the safe reset of the chip, and as systems without VSPK switch are not supported anymore, only the CS35L41 HDA driver should check its return. Signed-off-by: Lucas Tanure --- sound/pci/hda/cs35l41_hda.c | 60 +++++++++++++++---------------------- 1 file changed, 24 insertions(+), 36 deletions(-) diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index 3294837ff606..e54b5fbb6fb5 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -32,33 +32,9 @@ static const struct reg_sequence cs35l41_hda_mute[] = { { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_VOL_PCM Mute }; -// only on amps where GPIO1 is used to control ext. VSPK switch -static const struct reg_sequence cs35l41_start_ext_vspk[] = { +static const struct reg_sequence cs35l41_safe_to_reset[] = { { 0x00000040, 0x00000055 }, { 0x00000040, 0x000000AA }, - { 0x00007438, 0x00585941 }, - { 0x00007414, 0x08C82222 }, - { 0x0000742C, 0x00000009 }, - { 0x00011008, 0x00008001 }, - { 0x0000742C, 0x0000000F }, - { 0x0000742C, 0x00000079 }, - { 0x00007438, 0x00585941 }, - { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 - { 0x0000742C, 0x000000F9 }, - { 0x00007438, 0x00580941 }, - { 0x00000040, 0x000000CC }, - { 0x00000040, 0x00000033 }, -}; - -//only on amps where GPIO1 is used to control ext. VSPK switch -static const struct reg_sequence cs35l41_stop_ext_vspk[] = { - { 0x00000040, 0x00000055 }, - { 0x00000040, 0x000000AA }, - { 0x00007438, 0x00585941 }, - { 0x00002014, 0x00000000, 3000}, // set GLOBAL_EN = 0 - { 0x0000742C, 0x00000009 }, - { 0x00007438, 0x00580941 }, - { 0x00011008, 0x00000001 }, { 0x0000393C, 0x000000C0, 6000}, { 0x0000393C, 0x00000000 }, { 0x00007414, 0x00C82222 }, @@ -73,7 +49,7 @@ static const struct reg_sequence cs35l41_safe_to_active[] = { { 0x0000742C, 0x0000000F }, { 0x0000742C, 0x00000079 }, { 0x00007438, 0x00585941 }, - { CS35L41_PWR_CTRL1, 0x00000001, 2000 }, // GLOBAL_EN = 1 + { CS35L41_PWR_CTRL1, 0x00000001, 3000 }, // GLOBAL_EN = 1 { 0x0000742C, 0x000000F9 }, { 0x00007438, 0x00580941 }, { 0x00000040, 0x000000CC }, @@ -85,7 +61,7 @@ static const struct reg_sequence cs35l41_active_to_safe[] = { { 0x00000040, 0x000000AA }, { 0x00007438, 0x00585941 }, { CS35L41_PWR_CTRL1, 0x00000000 }, - { 0x0000742C, 0x00000009, 2000 }, + { 0x0000742C, 0x00000009, 3000 }, { 0x00007438, 0x00580941 }, { 0x00000040, 0x000000CC }, { 0x00000040, 0x00000033 }, @@ -101,6 +77,21 @@ static const struct reg_sequence cs35l41_reset_to_safe[] = { { 0x00000040, 0x00000033 }, }; +static bool cs35l41_hda_safe_reset(struct cs35l41_hda *cs35l41) +{ + switch (cs35l41->hw_cfg.bst_type) { + case CS35L41_EXT_BOOST: + regmap_write(cs35l41->regmap, CS35L41_GPIO1_CTRL1, 0x00000001); + regmap_multi_reg_write(cs35l41->regmap, cs35l41_safe_to_reset, + ARRAY_SIZE(cs35l41_safe_to_reset)); + return true; + case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: + return false; + default: + return true; + } +}; + static int cs35l41_hda_global_enable(struct cs35l41_hda *cs35l41, int enable) { int ret; @@ -113,13 +104,6 @@ static int cs35l41_hda_global_enable(struct cs35l41_hda *cs35l41, int enable) usleep_range(3000, 3100); break; case CS35L41_EXT_BOOST: - if (enable) - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_start_ext_vspk, - ARRAY_SIZE(cs35l41_start_ext_vspk)); - else - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_stop_ext_vspk, - ARRAY_SIZE(cs35l41_stop_ext_vspk)); - break; case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: if (enable) ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_safe_to_active, @@ -147,6 +131,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) regmap_multi_reg_write(reg, cs35l41_hda_config, ARRAY_SIZE(cs35l41_hda_config)); ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); + if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) + regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001); break; case HDA_GEN_PCM_ACT_PREPARE: ret = cs35l41_hda_global_enable(cs35l41, 1); @@ -158,6 +144,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) case HDA_GEN_PCM_ACT_CLOSE: ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); + if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) + regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001); break; default: dev_warn(cs35l41->dev, "Playback action not supported: %d\n", action); @@ -517,7 +505,7 @@ int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int i return 0; err: - if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) + if (cs35l41_hda_safe_reset(cs35l41)) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); @@ -531,7 +519,7 @@ void cs35l41_hda_remove(struct device *dev) component_del(cs35l41->dev, &cs35l41_hda_comp_ops); - if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) + if (cs35l41_hda_safe_reset(cs35l41)) gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_put(cs35l41->reset_gpio); } -- 2.35.1