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Message-ID: <1096bc5a-5b0f-54a8-93aa-403c39e58283@kernel.org>
Date:   Tue, 22 Mar 2022 19:24:54 +0100
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From:   Krzysztof Kozlowski <krzk@kernel.org>
Subject: Re: [Patch v5 1/4] memory: tegra: Add memory controller channels
 support
Content-Language: en-US
To:     Ashish Mhetre <amhetre@nvidia.com>, robh+dt@kernel.org,
        thierry.reding@gmail.com, digetx@gmail.com, jonathanh@nvidia.com,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-tegra@vger.kernel.org
Cc:     vdumpa@nvidia.com, Snikam@nvidia.com
References: <20220316092525.4554-1-amhetre@nvidia.com>
 <20220316092525.4554-2-amhetre@nvidia.com>
 <81aa7be7-0bfa-05e6-624a-393e6810dc61@kernel.org>
 <5259de16-6243-42f6-8252-40a23cd67798@nvidia.com>
In-Reply-To: <5259de16-6243-42f6-8252-40a23cd67798@nvidia.com>
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On 22/03/2022 19:04, Ashish Mhetre wrote:
> 
> 
> On 3/20/2022 6:01 PM, Krzysztof Kozlowski wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On 16/03/2022 10:25, Ashish Mhetre wrote:
>>>  From tegra186 onwards, memory controller support multiple channels.
>>> Add support for mapping address spaces of these channels.
>>> Make sure that number of channels are as expected on each SOC.
>>> During error interrupts from memory controller, appropriate registers
>>> from these channels need to be accessed for logging error info.
>>>
>>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
>>> ---
>>>   drivers/memory/tegra/mc.c       |  6 ++++
>>>   drivers/memory/tegra/tegra186.c | 52 +++++++++++++++++++++++++++++++++
>>>   drivers/memory/tegra/tegra194.c |  1 +
>>>   drivers/memory/tegra/tegra234.c |  1 +
>>>   include/soc/tegra/mc.h          |  7 +++++
>>>   5 files changed, 67 insertions(+)
>>>
>>> diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
>>> index bf3abb6d8354..3cda1d9ad32a 100644
>>> --- a/drivers/memory/tegra/mc.c
>>> +++ b/drivers/memory/tegra/mc.c
>>> @@ -749,6 +749,12 @@ static int tegra_mc_probe(struct platform_device *pdev)
>>>        if (IS_ERR(mc->regs))
>>>                return PTR_ERR(mc->regs);
>>>
>>> +     if (mc->soc->ops && mc->soc->ops->map_regs) {
>>> +             err = mc->soc->ops->map_regs(mc, pdev);
>>> +             if (err < 0)
>>> +                     return err;
>>> +     }
>>> +
>>>        mc->debugfs.root = debugfs_create_dir("mc", NULL);
>>>
>>>        if (mc->soc->ops && mc->soc->ops->probe) {
>>> diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra186.c
>>> index 3d153881abc1..a8a45e6ff1f1 100644
>>> --- a/drivers/memory/tegra/tegra186.c
>>> +++ b/drivers/memory/tegra/tegra186.c
>>> @@ -139,11 +139,62 @@ static int tegra186_mc_probe_device(struct tegra_mc *mc, struct device *dev)
>>>        return 0;
>>>   }
>>>
>>> +static int tegra186_mc_map_regs(struct tegra_mc *mc,
>>> +                             struct platform_device *pdev)
>>> +{
>>> +     struct device_node *np = pdev->dev.parent->of_node;
>>> +     int num_dt_channels, reg_cells = 0;
>>> +     struct resource *res;
>>> +     int i, ret;
>>> +     u32 val;
>>> +
>>> +     ret = of_property_read_u32(np, "#address-cells", &val);
>>> +     if (ret) {
>>> +             dev_err(&pdev->dev, "missing #address-cells property\n");
>>> +             return ret;
>>> +     }
>>> +
>>> +     reg_cells = val;
>>> +
>>> +     ret = of_property_read_u32(np, "#size-cells", &val);
>>> +     if (ret) {
>>> +             dev_err(&pdev->dev, "missing #size-cells property\n");
>>> +             return ret;
>>> +     }
>>> +
>>> +     reg_cells += val;
>>> +
>>> +     num_dt_channels = of_property_count_elems_of_size(pdev->dev.of_node, "reg",
>>> +                                                       reg_cells * sizeof(u32));
>>> +     /*
>>> +      * On tegra186 onwards, memory controller support multiple channels.
>>> +      * Apart from regular memory controller channels, there is one broadcast
>>> +      * channel and one for stream-id registers.
>>> +      */
>>> +     if (num_dt_channels < mc->soc->num_channels + 2) {
>>> +             dev_warn(&pdev->dev, "MC channels are missing, please update\n");
>>
>> How did you address our previous comments about ABI break? I really do
>> not see it.
>>
> In v4 patch, error was returned from here and probe failed causing ABI
> break. In v5, we are checking if number of reg items in DT is as
> expected or not. If number of reg items are less then we are just
> printing warning to update DT and returning 0. So probe won't fail and
> driver will work as expected.
> Also I had tested just driver patches with existing DT and it worked
> fine.

Ah, right, thanks. I missed the return 0. Looks good, thanks for the
changes and for explanation.


Best regards,
Krzysztof