Received: by 2002:a05:6a10:2726:0:0:0:0 with SMTP id ib38csp484641pxb; Thu, 24 Mar 2022 00:29:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwhJkOtG8WWRo833eP9hXKH3H2NcFR5vq8X5brw1nFqJVCZ16r/bl/2dYkZ+TpE19mG3+uJ X-Received: by 2002:aa7:cc02:0:b0:411:487e:36fe with SMTP id q2-20020aa7cc02000000b00411487e36femr5015648edt.338.1648106975807; Thu, 24 Mar 2022 00:29:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1648106975; cv=none; d=google.com; s=arc-20160816; b=ylNP/2xEXqe5PMczPG/77SABahLDWjZhMAMpL5Mmo62QCGQdFnRVK3KSJ0wbQqThMv MWOJMIyp5gSlPZBnD2HOFmCjTNMFzsvXop47NiJ/o/AC99UJTgB6t7+Qqw26X9m+6/nC /UjmiUTAICWr3xvhzFJDqr64ARTq7gNf2MSEUI3tqgraYVcmG0OezLuHejdmaAF/d2JF P4WUui1Wg53PVkyzpwuIVQpKXQ7lMDjDAhGe3BEL+Zy+ig+qhHkoHAyQn7WTLoNazE2D OCStCTi86W19qGHhjtQfUOiyvuO0Vhir1A91x+eJBcKJ3QW5PmjzoBjUbGHpdDuVMV4D zhKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:user-agent:references:message-id :in-reply-to:subject:cc:to:from:date; bh=bk1mstSHWVopNG9kTr1Oy6kOlgik5+uSt8mpxRUubp0=; b=KqQ0z+InkTBSYBHhJzwUZyO710q69MKI+D+RXQuUUI9tqyA/2yAwgVn/U8PGX1VJbm LRsLO0YvlEzDhjlnU+jtGb6VtysHez8gKYypd2ra2638YVvOd732zWklav1yltOFuVww yaldS7NTAdRKc9cWNA9NoiGgNovoXlAcmU7XJ40iAh2M8N8Glr/WVo6/b4FEdHbM53Tc skND1oglD171pUuASt77kg1ChOfn9+YEWZwkzIzVdRtMmvZqign16fbnGz5LCbz/WYDe x/YGqzs5m2I8Ba6X1vDXOsPqLsoy2hw874qEVtArAeb7WCjpRhC5jOZkTV+YU6/UAfj3 5JFg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g15-20020a17090669cf00b006df76385e24si15153498ejs.708.2022.03.24.00.29.10; Thu, 24 Mar 2022 00:29:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344394AbiCWWBC (ORCPT + 99 others); Wed, 23 Mar 2022 18:01:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229908AbiCWWBA (ORCPT ); Wed, 23 Mar 2022 18:01:00 -0400 Received: from angie.orcam.me.uk (angie.orcam.me.uk [78.133.224.34]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5577045040; Wed, 23 Mar 2022 14:59:29 -0700 (PDT) Received: by angie.orcam.me.uk (Postfix, from userid 500) id 963D292009D; Wed, 23 Mar 2022 22:59:28 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by angie.orcam.me.uk (Postfix) with ESMTP id 9423792009C; Wed, 23 Mar 2022 21:59:28 +0000 (GMT) Date: Wed, 23 Mar 2022 21:59:28 +0000 (GMT) From: "Maciej W. Rozycki" To: Andy Shevchenko cc: Mauro Carvalho Chehab , Andy Shevchenko , Greg Kroah-Hartman , Jiri Slaby , "open list:SERIAL DRIVERS" , Linux Kernel Mailing List Subject: Re: [PATCH v2 1/2] serial: 8250: Add proper clock handling for OxSemi PCIe devices In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 18 Mar 2022, Andy Shevchenko wrote: > > It does allow one to program the full clock divider range of the OxSemi > > devices. I find it appropriate according to my engineer's code of good > > practices. And it doesn't cause any burden for non-OxSemi code. > > How BOTHER does prevent you doing the same? It does not allow you to set arbitrary serial port clock rates. You can only set integer baud rates, and then only those that do not exceed the [1;65535] clock divisor range. > > So I have had a look at how it has been done for other drivers and I have > > now convinced myself against such a split. The primary reason for this > > conclusion is that there is no basic infrastructure for such a split and > > the ultimate result is code duplication with no clear benefit to justify > > it. > > Justification for split is to keep certain quirks out of the scope of the > generic driver. I'm not sure what duplication you are talking about if the > LOC statistics shows otherwise. All the init/remove code is almost the same across all the devices. And suspend/resume and PCI error handling code has been removed from the split off devices, and for the functional regression to be fixed: 1. this code would have to be replicated, or 2. handlers from the generic 8250_pci.c driver exported and referred to, or 3. some kind of a helper library (or a core module) created providing this stuff to 8250_*.c drivers as required. I guess the latter is the minimum that could convince me this driver framework is usable for implementing device-specific drivers (as I find the other variants rather miserable hacks). Plus there would have to be clear information provided to the users as otherwise people will be rather confused as to why 3 out of their 4 16x50 PCI/e serial cards work with 8250_pci.c while the remaining one does not (probably broken, or is it?). > You may not want to get the idea, it's fine. The rationale is simple: > isolate quirks for certain platform(s) in one place. Each platform > in a separate module. What is a platform in your terminology? A PCI/e option card you can install in about any modern computer? I usually think of platforms as specific families of computers rather than option cards. Variants of otherwise the same device are usually handled with a single driver in Linux. Maciej