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From:   Daniel Palmer <daniel@0x0f.com>
To:     devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
        robh+dt@kernel.org, andriy.shevchenko@linux.intel.com,
        jirislaby@kernel.org
Cc:     linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        romain.perier@gmail.com, Daniel Palmer <daniel@0x0f.com>
Subject: [PATCH 4/4] ARM: dts: mstar: Add second UART to base dtsi.
Date:   Thu, 24 Mar 2022 21:44:02 +0900
Message-Id: <20220324124402.3631379-5-daniel@0x0f.com>
In-Reply-To: <20220324124402.3631379-1-daniel@0x0f.com>
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Add the second UART to the base dtsi.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/mstar-v7.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 8464a8f1b136..baf2422b9854 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -182,6 +182,14 @@ pm_uart: uart@221000 {
 				clock-frequency = <172000000>;
 				status = "disabled";
 			};
+
+			uart1: uart@221200 {
+				compatible = "mstar,msc313-uart", "snps,dw-apb-uart";
+				reg = <0x221200 0x100>;
+				reg-shift = <3>;
+				interrupts-extended = <&intc_irq GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
 		};
 
 		imi: sram@a0000000 {
-- 
2.35.1