Received: by 2002:a05:6a10:2726:0:0:0:0 with SMTP id ib38csp2034554pxb; Fri, 25 Mar 2022 09:58:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJztGadqzryrGa7mw23NEnSs9/KX5JBacfwsM79hYLMZrTJvUUEl5FFqxzYnoJBdtokLdXah X-Received: by 2002:a17:906:4cca:b0:6ce:6a06:bf7 with SMTP id q10-20020a1709064cca00b006ce6a060bf7mr13117293ejt.109.1648227481246; Fri, 25 Mar 2022 09:58:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1648227481; cv=none; d=google.com; s=arc-20160816; b=OxZojbgQmt43lRNeMMIGmgwpA+PPRx5GMZ3EVTQFm9O6iZGf09GW2FIO0+1Z8vsFvs qCvhTan/ZTQoyiM+5aniv/mqfts4AGGIU8kINszif7qqCJQ289TVZNpsdOEzXdTMIcK2 Q60LWklNd712l5X8VJyHOAyKj+NqFEnbr58nG5rKuE6q67Cgq8+zPdwR9pT7xolnBlie GfZEBqcOFUuXb05SAVr7KszyiORTzfIo0ZKiGJ4T39yRr6yTpw8EEfT79SFvwc85qcEX DZ1BYu58yOkSN3GXvqyqPNnavvhyR41IWtogruTvQyNPDJp4S3nShQx5wob1QvJoaZ3b WmAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wezPSZBQoEkZq2HsDZML6kDVdlpXp6C1/ORU3Iz3nPg=; b=1EZobWjkaZBwe3ZELm4kWvc9KggM8BbmDA56zLJG5QJsMVTTa3d8bAKsdqQsTl+zUS 6MtYaONy3mKohKWpbrMvbbnEYe5hMpdY+KtquamGTzsRsXE4MDHq8yylUW5pTkKCpCOr I5B4lAoFNBelCL7/iGOKS4kuvdz2bRZ04zXYAM2o4I5udaBRlJSDVw1RRz/0FYJ7n9hA /iOKtiNvP6Yn/VuP1Pi3oczAHOfLHk2gK+//itUl4Ed8EXs6fUSYSZ2PzaJwCzreZUy8 hzrQb30l21iRNa0YykYE0qAUHasgNQVj2nzY+qOMaS3+Ou+soDDZOy4VURTqAbGOavJ0 IJ2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=k6HOHUr2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gh37-20020a1709073c2500b006df76385ce9si2893085ejc.393.2022.03.25.09.57.35; Fri, 25 Mar 2022 09:58:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=k6HOHUr2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358017AbiCYJke (ORCPT + 99 others); Fri, 25 Mar 2022 05:40:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356718AbiCYJk1 (ORCPT ); Fri, 25 Mar 2022 05:40:27 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 495721707F; Fri, 25 Mar 2022 02:38:54 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 060E5B827EB; Fri, 25 Mar 2022 09:38:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7819BC340F1; Fri, 25 Mar 2022 09:38:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1648201131; bh=dtnf8XsUhj4Osmhrrm08Dt6iD1UNUzpBusiWKcRHhvA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k6HOHUr2BmOyX1/Yyo6/+Bw3Vgdhuphkk5Nz3lnTzB45q9ImgxJ+g29bj+ck7Ppoq HwJnOQsXSt7FOTJXy5KCn32N4aZ6Wuk1WiePCxLNZdr9wz/j3fNtStv7m1EMVAZcyA LUWufHxopkNYsA3Gs0kGzNZLCR2+PY2tPyhEa6pLiMW/osfuxtVUkDfJycUyQTFhdc ClY01ZGoxMBAW3EAZQ44fBPe+s9fxN2Uq8psx5k1QduqIPT0BRdrWu1U6TEaZsd1O7 3eJhyjzHra3ZWxKCKfSi2jfQGgMiwRYeY+h8/zaSiFEjH2NhA71EHKEzZfN/AOB+Ce DmcC6I8kc62+A== Received: by pali.im (Postfix) id 09398A46; Fri, 25 Mar 2022 10:38:49 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Lorenzo Pieralisi , Bjorn Helgaas , Rob Herring , Andrew Lunn , Thomas Petazzoni , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , =?UTF-8?q?Marek=20Beh=C3=BAn?= , Russell King Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] dt-bindings: Add 'slot-power-limit-milliwatt' PCIe port property Date: Fri, 25 Mar 2022 10:38:25 +0100 Message-Id: <20220325093827.4983-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220325093827.4983-1-pali@kernel.org> References: <20220325093827.4983-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This property specifies slot power limit in mW unit. It is a form-factor and board specific value and must be initialized by hardware. Some PCIe controllers delegate this work to software to allow hardware flexibility and therefore this property basically specifies what should host bridge program into PCIe Slot Capabilities registers. The property needs to be specified in mW unit instead of the special format defined by Slot Capabilities (which encodes scaling factor or different unit). Host drivers should convert the value from mW to needed format. Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- This change was already accepted into dt-schema repo by Rob Herring: https://github.com/devicetree-org/dt-schema/pull/66 --- Documentation/devicetree/bindings/pci/pci.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt index 6a8f2874a24d..b0cc133ed00d 100644 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ b/Documentation/devicetree/bindings/pci/pci.txt @@ -32,6 +32,12 @@ driver implementation may support the following properties: root port to downstream device and host bridge drivers can do programming which depends on CLKREQ signal existence. For example, programming root port not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal. +- slot-power-limit-milliwatt: + If present, this property specifies slot power limit in milliwatts. Host + drivers can parse this property and use it for programming Root Port or host + bridge, or for composing and sending PCIe Set_Slot_Power_Limit messages + through the Root Port or host bridge when transitioning PCIe link from a + non-DL_Up Status to a DL_Up Status. PCI-PCI Bridge properties ------------------------- -- 2.20.1