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Date:   Thu, 24 Mar 2022 15:58:21 +0200
From:   Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To:     Daniel Palmer <daniel@0x0f.com>
Cc:     devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
        robh+dt@kernel.org, jirislaby@kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        romain.perier@gmail.com
Subject: Re: [PATCH 2/4] serial: 8250_dw: Add MStar MSC313 quirk
Message-ID: <Yjx4/TXKiizuQ+yH@smile.fi.intel.com>
References: <20220324124402.3631379-1-daniel@0x0f.com>
 <20220324124402.3631379-3-daniel@0x0f.com>
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On Thu, Mar 24, 2022 at 09:44:00PM +0900, Daniel Palmer wrote:
> The version of the IP used on the MStar MSC313 and later
> MStar and SigmaStar SoCs has the USR register at a different
> location. Add a quirk for this.

I'm fine with the change if it goes before [1]. Otherwise
you will need to rebase.

[1]: https://lore.kernel.org/linux-serial/20220317174627.360815-1-miquel.raynal@bootlin.com/

-- 
With Best Regards,
Andy Shevchenko