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[185.243.124.10]) by smtp.gmail.com with ESMTPSA id b3-20020aa7d483000000b00419209d4c85sm422261edr.66.2022.03.23.13.37.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Mar 2022 13:37:17 -0700 (PDT) Date: Wed, 23 Mar 2022 21:37:13 +0100 From: Petr Vorel To: Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Bastian =?iso-8859-2?Q?K=F6cher?= , Jeremy McNicoll , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] clk: qcom: gcc-msm8994: Fix gpll4 width Message-ID: Reply-To: Petr Vorel References: <20220319174940.341137-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220319174940.341137-1-konrad.dybcio@somainline.org> X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Konrad, Reviewed-by: Petr Vorel > The gpll4 postdiv is actually a div4, so make sure that Linux is aware of > this. > This fixes the following error messages: > [ 0.804491] mmc1: Card appears overclocked; req 200000000 Hz, actual 343999999 Hz > [ 0.805057] mmc1: Card appears overclocked; req 400000000 Hz, actual 687999999 Hz yes, this works on my patchset [1] even without these workarounds (I'll submit v5 without it) + assigned-clocks = <&gcc GPLL4_EARLY>; + assigned-clock-rates = <384000000>; Tested-by: Petr Vorel Kind regards, Petr [1] https://lore.kernel.org/linux-arm-msm/20220218203710.895-1-petr.vorel@gmail.com/ > Fixes: aec89f78cf01 ("clk: qcom: Add support for msm8994 global clock controller") > Signed-off-by: Konrad Dybcio > --- > Cc: Petr Vorel > drivers/clk/qcom/gcc-msm8994.c | 1 + > 1 file changed, 1 insertion(+) > diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c > index f09499999eb3..6b702cdacbf2 100644 > --- a/drivers/clk/qcom/gcc-msm8994.c > +++ b/drivers/clk/qcom/gcc-msm8994.c > @@ -77,6 +77,7 @@ static struct clk_alpha_pll gpll4_early = { > static struct clk_alpha_pll_postdiv gpll4 = { > .offset = 0x1dc0, > + .width = 4, > .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], > .clkr.hw.init = &(struct clk_init_data){ > .name = "gpll4",