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Message-ID: <6e69959f-ba30-e5b1-c096-c81ffb3a6ecc@oracle.com>
Date:   Fri, 25 Mar 2022 19:06:03 +0000
Subject: Re: [PATCH] iommu/arm: Expose ARM SMMUv3 related registers via sysfs
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To:     Robin Murphy <robin.murphy@arm.com>,
        Miguel Luis <miguel.luis@oracle.com>
Cc:     Will Deacon <will@kernel.org>, Joerg Roedel <joro@8bytes.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        David Edmondson <david.edmondson@oracle.com>
References: <20220323125500.76684-1-miguel.luis@oracle.com>
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From:   Joao Martins <joao.m.martins@oracle.com>
In-Reply-To: <03df9921-49de-4a9d-1ef2-c5d191feaae8@arm.com>
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 =?utf-8?B?UXh4WFRvZ3BYc0kzdC93ekV1MzQ4OThOdkwxcmYrQjNoallUVWZDM0tTT3Yy?=
 =?utf-8?B?Z0Q5emtRY2xYSkp6WjBNUzJLTlJ0c1ZpOVdaWEVPd0JBeUhhZ0NnSHB0OTJm?=
 =?utf-8?B?UTZleXg3V2NNZU1YUnRSU3FnN1d5WEYvNGZycFYvVXFzTVlEK0o5emJnK3hE?=
 =?utf-8?B?ZytWa013MllwSXF6QXh3QmdQNGVvTVlLRGNqZXhZUjdoQjNjWlpkNHNWN3ZU?=
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 =?utf-8?B?Ri9mMW03VExMYjE2b3FGWkVVWTR2enhVREFoeWxtODBwTXlXMWorMW5TbGhF?=
 =?utf-8?B?NXV0eHBlc0V5OFkyTDd3SnFDekhNWjZKQytXRnlJQ0hSancvTTFzZzVPV2h0?=
 =?utf-8?B?WThHc0RtRndNMWVFRTN5bGkyZzZCREtJOG1ibldkd3BkekZSc3dlYzZXcEhw?=
 =?utf-8?B?V0pKM3pXaFBvcWk4cmcrU3FBY3dFNStIZjF5RWV5NzVPM0h6M3hiNlBLaWRz?=
 =?utf-8?B?eUJIbTBLMlRuYmo5WEFzOUc2NHVkbHlZTlFsQjd0N0VkZ0d5a29rWm8zajNZ?=
 =?utf-8?B?dlN3bzdZR1h0Yk1nYUtDQndRVEtOaW1pK0d2ZWtDUkZpdlpyNDBtbXBwYzBN?=
 =?utf-8?B?RWw5V2pORUQ2bDRISlVES0NCcnhZQk93ZDd0UElJSG1sdEFYUDZnZW0zbDNq?=
 =?utf-8?B?R0REWlUrNVpKdVRTZEFMTWNwamkxUmdrVGhOVG1BU1p4TEJJa2ZHK0Nibmpq?=
 =?utf-8?B?MnFFQ3NBNlN3eXdYRmxHOXdiVXlNS3EwblRtZVdOK3NKRjMxVWVsRFR5YzlR?=
 =?utf-8?B?MVgrbWlJVEVKRENBRmt4SUpRUWl0TEJ1WklibkZvZ0dEMWpXNDMzTzZmdC9E?=
 =?utf-8?B?eFNSalNqNnNlQVFBYUI3RXV6Tk8xNHQ5QTBRbHlYL0VSSzVEZXAvMThvWUJ3?=
 =?utf-8?B?ZHdJcGRUNEV2YkFpVHRPR2lnUzg2ajdJNjJsL0VtSUZJaE4rM0ROd0dNdTll?=
 =?utf-8?B?eHhHc3R5bS9rMktHK2xJQzhGZlM4T29BYXNOd2k3aitLWVk2VEhIZXpXbVVB?=
 =?utf-8?B?aHo3REJxRzNob2JrZmVuTHZnL214d0RGcHZ3R09FNGRLbFVLZk9EUHBoZzBr?=
 =?utf-8?B?ckhvZnFFYWsyc2hJcGE4ck8wT1lzeTd2UGJjMnpjZWxmUjg5SFlmNDZYR1No?=
 =?utf-8?B?cHF3aW81M1B0M3hlWTM4T2l1SjhYcUkvUXhpazFCYytpMTJkeVhtU25QcURh?=
 =?utf-8?B?VzhHSDQ2VDZGcUc4bG1zYTh5elVQcEtPR2V1YVdSOGRTK2tGL056NlhjNkhB?=
 =?utf-8?B?VWY0NFlud1pQbTY2Ti9iOE9jbjlQSTAvU3dNOFJPcU0yV3ZSWmI0aWZpK3Qy?=
 =?utf-8?B?QTQ1WlpFR2J0RndaTmRTSDBQNzUzcGJRamdlSXJnS2czbzNkTHBEOFAyTk9Z?=
 =?utf-8?B?QThiRE51ZklWY1NnKzB3MnAxN1BqUDNOUFFVRXo0b1A3b3ZkWXh2cGZiK1Zu?=
 =?utf-8?B?TUxBQ0pkTi9CMnpQbFliektidkZVWUdUTXJmQ0g5cWQrc2xQNlNWV0c2a2FI?=
 =?utf-8?B?MFYxaVRvUzVwN29FSG4vVG85MU1qdkppU3N3bDY0ZlRYbEgwTERpSWhrb2dT?=
 =?utf-8?Q?+TPjSbYn8wCFMxp4=3D?=
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On 3/25/22 18:03, Robin Murphy wrote:
> On 2022-03-23 15:09, Miguel Luis wrote:
>>> On 23 Mar 2022, at 12:40, Robin Murphy <robin.murphy@arm.com> wrote:
>>> On 2022-03-23 12:54, Miguel Luis wrote:
>>>> Allows userspace to check for SMMUv3 features.
>>>
>>> What will userspace do with that information?
>>>
>>> It hardly matters what fancy new features might be present, if the kernel and/or the abstracted interfaces available to userspace aren't using them. Any functionality which is supported by a usable interface should ideally be represented via that interface itself.
>>>
>>
>> The inspiration was the same that Intel (cap/ecap) and AMD (cap/features) took
>> exposing it's iommu feature registers on sysfs. It's an easy way to understand
>> which features are supported by the hardware regardless of what the kernel
>> supports.
> 
> OK, so what do end-users of Intel and AMD systems do with that 
> understanding then?
> 
It's features probing and informational purposes really -- that's all
one can do with these registers regardless of IOMMU implementation.
There some others which print the version of the iommu that also appear
as RO sysfs entries.

Those two registers on those two implementations have proved useful the
last couple of years when I got new SDPs/machines.

At the end of the day some tool (or script) pretty prints what's
supported.. on what usually is depicted in very lenghty manuals.
And that's fed into a toolbox that prints all hardware and software
capabilities alongside diagnostics / etc (for troubleshooting).
You know, similar to `cpuid` on the x86 cpuid side (albeit you could
argue that it's behind a 'special' instruction). And that 'decodes' to
an human-friendly on what goes in those lenghty SDMs. `/proc/cpuinfo`
translates that into a set of keywords (which may be software-specific or
hardware features). And more recently `kcpuid` for raw-supported
features. I am sure there's more examples.

>> For example I could print the smmu->features and that would cover kernel
>> supported features but wouldn't help when new hardware arrives to know which
>> features are supported by the hardware.
> 
> Indeed the driver already prints the supported features at boot, largely 
> because it's useful for debugging. But again, what's the advantage of 
> knowing what you might theoretically be able to do with a machine if you 
> don't have the software support to actually do it? Are there users out 
> there who aren't going to update their OS *unless* they can cling to the 
> hope that a new OS might see the opportunity to use foreign-endianness 
> pagetables and finally take it?
> 
> I appreciate the natural human instinct to want to poke around at and 
> evaluate a new shiny thing, but a sufficiently interested user can 
> already do that with /dev/mem or any number of other ways. We don't need 
> the burden of maintaining an upstream sysfs ABI for curiosity.
> 
/dev/mem is an interesting alternative -- I wasn't quite sure you could use
the register addresses here arbitrarily on ARM. Anyways, I suppose it's an
worthwhile alternative in case it works.

> The other fact of the matter is that a great deal of systems with SMMUv3 
> will be using one of Arm Ltd's implementations, and as soon as one knows 
> that one can readily look up all the details in Arm's documentation. 
> Especially when one already has that site open to find the SMMUv3 
> architecture spec to make sense of cryptic register dumps, right?
> 
Heh, the idea was to avoid going to those specs all the time, but I understand
your earlier point(s).

Also, IOMMUs are getting bigger in terms of featureset -- so it would be nice to
better introspect what iommus can do (in the whatever mix of implementations)
in a less chaotic manner. Maybe implementation-specific sysfs entries are not it,
but hopefully something else in a more generic-way, in the advent of a more
direct interface to iommus.