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Date:   Wed, 30 Mar 2022 16:45:25 +0800
From:   kernel test robot <lkp@intel.com>
To:     Shirish S <Shirish.S@amd.com>
Cc:     kbuild-all@lists.01.org, linux-kernel@vger.kernel.org,
        Borislav Petkov <bp@suse.de>
Subject: arch/x86/kernel/cpu/mce/amd.c:552:6: warning: no previous prototype
 for 'disable_err_thresholding'
Message-ID: <202203301632.RmI9R5aU-lkp@intel.com>
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Hi Shirish,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   965181d7ef7e1a863477536dc328c23a7ebc8a1d
commit: 30aa3d26edb0f3d7992757287eec0ca588a5c259 x86/MCE/AMD: Carve out the MC4_MISC thresholding quirk
date:   3 years, 2 months ago
config: x86_64-defconfig (https://download.01.org/0day-ci/archive/20220330/202203301632.RmI9R5aU-lkp@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
reproduce (this is a W=1 build):
        # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=30aa3d26edb0f3d7992757287eec0ca588a5c259
        git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
        git fetch --no-tags linus master
        git checkout 30aa3d26edb0f3d7992757287eec0ca588a5c259
        # save the config file to linux build tree
        mkdir build_dir
        make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash arch/x86/kernel/cpu/mce/ drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> arch/x86/kernel/cpu/mce/amd.c:552:6: warning: no previous prototype for 'disable_err_thresholding' [-Wmissing-prototypes]
     552 | void disable_err_thresholding(struct cpuinfo_x86 *c)
         |      ^~~~~~~~~~~~~~~~~~~~~~~~


vim +/disable_err_thresholding +552 arch/x86/kernel/cpu/mce/amd.c

   547	
   548	/*
   549	 * Turn off MC4_MISC thresholding banks on all family 0x15 models since
   550	 * they're not supported there.
   551	 */
 > 552	void disable_err_thresholding(struct cpuinfo_x86 *c)
   553	{
   554		int i;
   555		u64 hwcr;
   556		bool need_toggle;
   557		u32 msrs[] = {
   558			0x00000413, /* MC4_MISC0 */
   559			0xc0000408, /* MC4_MISC1 */
   560		};
   561	
   562		if (c->x86 != 0x15)
   563			return;
   564	
   565		rdmsrl(MSR_K7_HWCR, hwcr);
   566	
   567		/* McStatusWrEn has to be set */
   568		need_toggle = !(hwcr & BIT(18));
   569	
   570		if (need_toggle)
   571			wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));
   572	
   573		/* Clear CntP bit safely */
   574		for (i = 0; i < ARRAY_SIZE(msrs); i++)
   575			msr_clear_bit(msrs[i], 62);
   576	
   577		/* restore old settings */
   578		if (need_toggle)
   579			wrmsrl(MSR_K7_HWCR, hwcr);
   580	}
   581	

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