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Wed, 30 Mar 2022 04:29:38 +0000 Received: from MW4PR12MB5668.namprd12.prod.outlook.com ([fe80::5d27:53d9:5dbe:49fd]) by MW4PR12MB5668.namprd12.prod.outlook.com ([fe80::5d27:53d9:5dbe:49fd%3]) with mapi id 15.20.5102.022; Wed, 30 Mar 2022 04:29:38 +0000 From: "VURDIGERENATARAJ, CHANDAN" To: "Lin, Tsung-hua (Ryan)" CC: "David (ChunMing) Zhou" , Drew Davenport , "Li, Sun peng (Leo)" , "Li, Leon" , "dri-devel@lists.freedesktop.org" , "Siqueira, Rodrigo" , "linux-kernel@vger.kernel.org" , "amd-gfx@lists.freedesktop.org" , "Koenig, Christian" , David Airlie , Sean Paul , Louis Li , Daniel Vetter , Bas Nieuwenhuizen , "Deucher, Alexander" , =?iso-8859-1?Q?St=E9phane_Marchesin?= , "Kazlauskas, Nicholas" , "Wentland, Harry" , "Lin, Tsung-hua (Ryan)" , Mark Yacoub Subject: RE: [PATCH v2] drm/amdgpu: fix that issue that the number of the crtc of the 3250c is not correct Thread-Topic: [PATCH v2] drm/amdgpu: fix that issue that the number of the crtc of the 3250c is not correct Thread-Index: AQHYQ+Hv6rbl9hCEq0aViheFKo1J4qzXTxsA Date: Wed, 30 Mar 2022 04:29:38 +0000 Message-ID: References: <20220127081237.13903-1-Tsung-Hua.Lin@amd.com> <20220330024643.162230-1-tsung-hua.lin@amd.com> In-Reply-To: <20220330024643.162230-1-tsung-hua.lin@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MW4PR12MB5668.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0580cd3b-6e72-4f79-b316-08da1205e712 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Mar 2022 04:29:38.5058 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: eXKlIFfHmJ5UoNbv/dIhUaSEe0apWap/WfSg3T6WEHNn2q3PQKiDJMcavDCQLakvuEXIzJJffvODYU0uIvGw9w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4323 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ryan, Is this change applicable on a specific kernel version? On latest I see IP DISCOVERY based impl for CHIP_RAVEN. >[Why] >External displays take priority over internal display when there are fewer= display controllers than displays. > > [How] >The root cause is because of that number of the crtc is not correct. >The number of the crtc on the 3250c is 3, but on the 3500c is 4. >On the source code, we can see that number of the crtc has been fixed at 4= . >Needs to set the num_crtc to 3 for 3250c platform. > >v2: > - remove unnecessary comments and Id > >Signed-off-by: Ryan Lin > >--- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > >diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/g= pu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >index 40c91b448f7da..455a2c45e8cda 100644 >--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c >@@ -2738,9 +2738,15 @@ static int dm_early_init(void *handle) > break; > #if defined(CONFIG_DRM_AMD_DC_DCN1_0) > case CHIP_RAVEN: >- adev->mode_info.num_crtc =3D 4; >- adev->mode_info.num_hpd =3D 4; >- adev->mode_info.num_dig =3D 4; >+ if (adev->rev_id >=3D 8) { May I know what this ">=3D8" indicate? Also, should it be external_rev_id i= f its based on old version? >+ adev->mode_info.num_crtc =3D 3; >+ adev->mode_info.num_hpd =3D 3; >+ adev->mode_info.num_dig =3D 3; >+ } else { >+ adev->mode_info.num_crtc =3D 4; >+ adev->mode_info.num_hpd =3D 4; >+ adev->mode_info.num_dig =3D 4; >+ } > break; > #endif > #if defined(CONFIG_DRM_AMD_DC_DCN2_0) >-- >2.25.1 > BR, Chandan V N