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Message-ID: <d8e5e5ce-aac3-fe37-d710-88639a1a62f3@deltatee.com>
Date:   Wed, 30 Mar 2022 09:20:26 -0600
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To:     Shlomo Pongratz <shlomopongratz@gmail.com>,
        linux-pci@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org, andrew.maier@eideticom.com,
        bhelgaas@google.com, jgg@nvidia.com, helgaas@kernel.org,
        Shlomo Pongratz <shlomop@pliops.com>
References: <20220330140823.28826-1-shlomop@pliops.com>
 <20220330140823.28826-2-shlomop@pliops.com>
From:   Logan Gunthorpe <logang@deltatee.com>
In-Reply-To: <20220330140823.28826-2-shlomop@pliops.com>
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Subject: Re: [PATCH V4 1/1] Intel Sky Lake-E host root ports check.
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On 2022-03-30 08:08, Shlomo Pongratz wrote:
> In commit 7b94b53db34f ("PCI/P2PDMA: Add Intel Sky Lake-E Root Ports B, C, D to
> the whitelist")
> Andrew Maier added the Sky Lake-E additional devices
> 2031, 2032 and 2033 root ports to the already existing 2030 device.
> 
> The Intel devices 2030, 2031, 2032 and 2033 which are root ports A, B, C and D,
> respectively and if all exist they will occupy slots 0 till 3 in that order.
> 
> The original code handled only the case where the devices in the whiltlist are

s/whiltlist/whitelist/

> host bridges and assumed that they will be found on slot 0.
> 
> This assumption doesn't hold for root ports so an explicit test was added to
> cover this case.
> 
> Signed-off-by: Shlomo Pongratz <shlomop@pliops.com>

This patch looks good to me. Much cleaner and easier to understand than
the previous ones.

Reviewed-by: Logan Gunthorpe <logang@deltatee.com>

Thanks,

Logan