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([2001:861:44c0:66c0:e47f:3cdb:5811:cee8]) by smtp.gmail.com with ESMTPSA id c5-20020a5d63c5000000b002040822b680sm25478862wrw.81.2022.03.30.08.22.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Mar 2022 08:22:22 -0700 (PDT) Message-ID: <357c0ae6-7910-dfe5-eefa-1a7820e7e46b@baylibre.com> Date: Wed, 30 Mar 2022 17:22:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v3 09/13] pinctrl: meson: Rename REG_* to MESON_REG_* Content-Language: en-US To: Andy Shevchenko , Qianggui Song , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> <20220330145030.1562-10-andriy.shevchenko@linux.intel.com> From: Neil Armstrong Organization: Baylibre In-Reply-To: <20220330145030.1562-10-andriy.shevchenko@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30/03/2022 16:50, Andy Shevchenko wrote: > Rename REG_* to MESON_REG_* as a prerequisite for enabling COMPILE_TEST. > > Signed-off-by: Andy Shevchenko > --- > drivers/pinctrl/meson/pinctrl-meson.c | 24 ++++++++++++------------ > drivers/pinctrl/meson/pinctrl-meson.h | 24 ++++++++++++------------ > 2 files changed, 24 insertions(+), 24 deletions(-) > > diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c > index 49851444a6e3..5b46a0979db7 100644 > --- a/drivers/pinctrl/meson/pinctrl-meson.c > +++ b/drivers/pinctrl/meson/pinctrl-meson.c > @@ -218,13 +218,13 @@ static int meson_pinconf_set_output(struct meson_pinctrl *pc, > unsigned int pin, > bool out) > { > - return meson_pinconf_set_gpio_bit(pc, pin, REG_DIR, !out); > + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_DIR, !out); > } > > static int meson_pinconf_get_output(struct meson_pinctrl *pc, > unsigned int pin) > { > - int ret = meson_pinconf_get_gpio_bit(pc, pin, REG_DIR); > + int ret = meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_DIR); > > if (ret < 0) > return ret; > @@ -236,13 +236,13 @@ static int meson_pinconf_set_drive(struct meson_pinctrl *pc, > unsigned int pin, > bool high) > { > - return meson_pinconf_set_gpio_bit(pc, pin, REG_OUT, high); > + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_OUT, high); > } > > static int meson_pinconf_get_drive(struct meson_pinctrl *pc, > unsigned int pin) > { > - return meson_pinconf_get_gpio_bit(pc, pin, REG_OUT); > + return meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_OUT); > } > > static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc, > @@ -269,7 +269,7 @@ static int meson_pinconf_disable_bias(struct meson_pinctrl *pc, > if (ret) > return ret; > > - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); > ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), 0); > if (ret) > return ret; > @@ -288,7 +288,7 @@ static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin, > if (ret) > return ret; > > - meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit); > if (pull_up) > val = BIT(bit); > > @@ -296,7 +296,7 @@ static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin, > if (ret) > return ret; > > - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); > ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), BIT(bit)); > if (ret) > return ret; > @@ -321,7 +321,7 @@ static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc, > if (ret) > return ret; > > - meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit); > > if (drive_strength_ua <= 500) { > ds_val = MESON_PINCONF_DRV_500UA; > @@ -407,7 +407,7 @@ static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin) > if (ret) > return ret; > > - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); > > ret = regmap_read(pc->reg_pullen, reg, &val); > if (ret) > @@ -416,7 +416,7 @@ static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin) > if (!(val & BIT(bit))) { > conf = PIN_CONFIG_BIAS_DISABLE; > } else { > - meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit); > > ret = regmap_read(pc->reg_pull, reg, &val); > if (ret) > @@ -447,7 +447,7 @@ static int meson_pinconf_get_drive_strength(struct meson_pinctrl *pc, > if (ret) > return ret; > > - meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit); > > ret = regmap_read(pc->reg_ds, reg, &val); > if (ret) > @@ -595,7 +595,7 @@ static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio) > if (ret) > return ret; > > - meson_calc_reg_and_bit(bank, gpio, REG_IN, ®, &bit); > + meson_calc_reg_and_bit(bank, gpio, MESON_REG_IN, ®, &bit); > regmap_read(pc->reg_gpio, reg, &val); > > return !!(val & BIT(bit)); > diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h > index ff5372e0a475..fa042cd6a7ff 100644 > --- a/drivers/pinctrl/meson/pinctrl-meson.h > +++ b/drivers/pinctrl/meson/pinctrl-meson.h > @@ -63,12 +63,12 @@ struct meson_reg_desc { > * enum meson_reg_type - type of registers encoded in @meson_reg_desc > */ > enum meson_reg_type { > - REG_PULLEN, > - REG_PULL, > - REG_DIR, > - REG_OUT, > - REG_IN, > - REG_DS, > + MESON_REG_PULLEN, > + MESON_REG_PULL, > + MESON_REG_DIR, > + MESON_REG_OUT, > + MESON_REG_IN, > + MESON_REG_DS, > NUM_REG, > }; > > @@ -150,12 +150,12 @@ struct meson_pinctrl { > .irq_first = fi, \ > .irq_last = li, \ > .regs = { \ > - [REG_PULLEN] = { per, peb }, \ > - [REG_PULL] = { pr, pb }, \ > - [REG_DIR] = { dr, db }, \ > - [REG_OUT] = { or, ob }, \ > - [REG_IN] = { ir, ib }, \ > - [REG_DS] = { dsr, dsb }, \ > + [MESON_REG_PULLEN] = { per, peb }, \ > + [MESON_REG_PULL] = { pr, pb }, \ > + [MESON_REG_DIR] = { dr, db }, \ > + [MESON_REG_OUT] = { or, ob }, \ > + [MESON_REG_IN] = { ir, ib }, \ > + [MESON_REG_DS] = { dsr, dsb }, \ > }, \ > } > Reviewed-by: Neil Armstrong